rsi_91x_sdio_ops.c 10 KB

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  1. /**
  2. * Copyright (c) 2014 Redpine Signals Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. *
  16. */
  17. #include <linux/firmware.h>
  18. #include <net/rsi_91x.h>
  19. #include "rsi_sdio.h"
  20. #include "rsi_common.h"
  21. /**
  22. * rsi_sdio_master_access_msword() - This function sets the AHB master access
  23. * MS word in the SDIO slave registers.
  24. * @adapter: Pointer to the adapter structure.
  25. * @ms_word: ms word need to be initialized.
  26. *
  27. * Return: status: 0 on success, -1 on failure.
  28. */
  29. int rsi_sdio_master_access_msword(struct rsi_hw *adapter, u16 ms_word)
  30. {
  31. u8 byte;
  32. u8 function = 0;
  33. int status = 0;
  34. byte = (u8)(ms_word & 0x00FF);
  35. rsi_dbg(INIT_ZONE,
  36. "%s: MASTER_ACCESS_MSBYTE:0x%x\n", __func__, byte);
  37. status = rsi_sdio_write_register(adapter,
  38. function,
  39. SDIO_MASTER_ACCESS_MSBYTE,
  40. &byte);
  41. if (status) {
  42. rsi_dbg(ERR_ZONE,
  43. "%s: fail to access MASTER_ACCESS_MSBYTE\n",
  44. __func__);
  45. return -1;
  46. }
  47. byte = (u8)(ms_word >> 8);
  48. rsi_dbg(INIT_ZONE, "%s:MASTER_ACCESS_LSBYTE:0x%x\n", __func__, byte);
  49. status = rsi_sdio_write_register(adapter,
  50. function,
  51. SDIO_MASTER_ACCESS_LSBYTE,
  52. &byte);
  53. return status;
  54. }
  55. static void rsi_rx_handler(struct rsi_hw *adapter);
  56. void rsi_sdio_rx_thread(struct rsi_common *common)
  57. {
  58. struct rsi_hw *adapter = common->priv;
  59. struct rsi_91x_sdiodev *sdev = adapter->rsi_dev;
  60. do {
  61. rsi_wait_event(&sdev->rx_thread.event, EVENT_WAIT_FOREVER);
  62. rsi_reset_event(&sdev->rx_thread.event);
  63. rsi_rx_handler(adapter);
  64. } while (!atomic_read(&sdev->rx_thread.thread_done));
  65. rsi_dbg(INFO_ZONE, "%s: Terminated SDIO RX thread\n", __func__);
  66. atomic_inc(&sdev->rx_thread.thread_done);
  67. complete_and_exit(&sdev->rx_thread.completion, 0);
  68. }
  69. /**
  70. * rsi_process_pkt() - This Function reads rx_blocks register and figures out
  71. * the size of the rx pkt.
  72. * @common: Pointer to the driver private structure.
  73. *
  74. * Return: 0 on success, -1 on failure.
  75. */
  76. static int rsi_process_pkt(struct rsi_common *common)
  77. {
  78. struct rsi_hw *adapter = common->priv;
  79. struct rsi_91x_sdiodev *dev =
  80. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  81. u8 num_blks = 0;
  82. u32 rcv_pkt_len = 0;
  83. int status = 0;
  84. u8 value = 0;
  85. num_blks = ((adapter->interrupt_status & 1) |
  86. ((adapter->interrupt_status >> RECV_NUM_BLOCKS) << 1));
  87. if (!num_blks) {
  88. status = rsi_sdio_read_register(adapter,
  89. SDIO_RX_NUM_BLOCKS_REG,
  90. &value);
  91. if (status) {
  92. rsi_dbg(ERR_ZONE,
  93. "%s: Failed to read pkt length from the card:\n",
  94. __func__);
  95. return status;
  96. }
  97. num_blks = value & 0x1f;
  98. }
  99. if (dev->write_fail == 2)
  100. rsi_sdio_ack_intr(common->priv, (1 << MSDU_PKT_PENDING));
  101. if (unlikely(!num_blks)) {
  102. dev->write_fail = 2;
  103. return -1;
  104. }
  105. rcv_pkt_len = (num_blks * 256);
  106. status = rsi_sdio_host_intf_read_pkt(adapter, dev->pktbuffer,
  107. rcv_pkt_len);
  108. if (status) {
  109. rsi_dbg(ERR_ZONE, "%s: Failed to read packet from card\n",
  110. __func__);
  111. return status;
  112. }
  113. status = rsi_read_pkt(common, dev->pktbuffer, rcv_pkt_len);
  114. if (status) {
  115. rsi_dbg(ERR_ZONE, "Failed to read the packet\n");
  116. return status;
  117. }
  118. return 0;
  119. }
  120. /**
  121. * rsi_init_sdio_slave_regs() - This function does the actual initialization
  122. * of SDBUS slave registers.
  123. * @adapter: Pointer to the adapter structure.
  124. *
  125. * Return: status: 0 on success, -1 on failure.
  126. */
  127. int rsi_init_sdio_slave_regs(struct rsi_hw *adapter)
  128. {
  129. struct rsi_91x_sdiodev *dev =
  130. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  131. u8 function = 0;
  132. u8 byte;
  133. int status = 0;
  134. if (dev->next_read_delay) {
  135. byte = dev->next_read_delay;
  136. status = rsi_sdio_write_register(adapter,
  137. function,
  138. SDIO_NXT_RD_DELAY2,
  139. &byte);
  140. if (status) {
  141. rsi_dbg(ERR_ZONE,
  142. "%s: Failed to write SDIO_NXT_RD_DELAY2\n",
  143. __func__);
  144. return -1;
  145. }
  146. }
  147. if (dev->sdio_high_speed_enable) {
  148. rsi_dbg(INIT_ZONE, "%s: Enabling SDIO High speed\n", __func__);
  149. byte = 0x3;
  150. status = rsi_sdio_write_register(adapter,
  151. function,
  152. SDIO_REG_HIGH_SPEED,
  153. &byte);
  154. if (status) {
  155. rsi_dbg(ERR_ZONE,
  156. "%s: Failed to enable SDIO high speed\n",
  157. __func__);
  158. return -1;
  159. }
  160. }
  161. /* This tells SDIO FIFO when to start read to host */
  162. rsi_dbg(INIT_ZONE, "%s: Initialzing SDIO read start level\n", __func__);
  163. byte = 0x24;
  164. status = rsi_sdio_write_register(adapter,
  165. function,
  166. SDIO_READ_START_LVL,
  167. &byte);
  168. if (status) {
  169. rsi_dbg(ERR_ZONE,
  170. "%s: Failed to write SDIO_READ_START_LVL\n", __func__);
  171. return -1;
  172. }
  173. rsi_dbg(INIT_ZONE, "%s: Initialzing FIFO ctrl registers\n", __func__);
  174. byte = (128 - 32);
  175. status = rsi_sdio_write_register(adapter,
  176. function,
  177. SDIO_READ_FIFO_CTL,
  178. &byte);
  179. if (status) {
  180. rsi_dbg(ERR_ZONE,
  181. "%s: Failed to write SDIO_READ_FIFO_CTL\n", __func__);
  182. return -1;
  183. }
  184. byte = 32;
  185. status = rsi_sdio_write_register(adapter,
  186. function,
  187. SDIO_WRITE_FIFO_CTL,
  188. &byte);
  189. if (status) {
  190. rsi_dbg(ERR_ZONE,
  191. "%s: Failed to write SDIO_WRITE_FIFO_CTL\n", __func__);
  192. return -1;
  193. }
  194. return 0;
  195. }
  196. /**
  197. * rsi_rx_handler() - Read and process SDIO interrupts.
  198. * @adapter: Pointer to the adapter structure.
  199. *
  200. * Return: None.
  201. */
  202. static void rsi_rx_handler(struct rsi_hw *adapter)
  203. {
  204. struct rsi_common *common = adapter->priv;
  205. struct rsi_91x_sdiodev *dev =
  206. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  207. int status;
  208. enum sdio_interrupt_type isr_type;
  209. u8 isr_status = 0;
  210. u8 fw_status = 0;
  211. dev->rx_info.sdio_int_counter++;
  212. do {
  213. mutex_lock(&common->rx_lock);
  214. status = rsi_sdio_read_register(common->priv,
  215. RSI_FN1_INT_REGISTER,
  216. &isr_status);
  217. if (status) {
  218. rsi_dbg(ERR_ZONE,
  219. "%s: Failed to Read Intr Status Register\n",
  220. __func__);
  221. mutex_unlock(&common->rx_lock);
  222. return;
  223. }
  224. adapter->interrupt_status = isr_status;
  225. if (isr_status == 0) {
  226. rsi_set_event(&common->tx_thread.event);
  227. dev->rx_info.sdio_intr_status_zero++;
  228. mutex_unlock(&common->rx_lock);
  229. return;
  230. }
  231. rsi_dbg(ISR_ZONE, "%s: Intr_status = %x %d %d\n",
  232. __func__, isr_status, (1 << MSDU_PKT_PENDING),
  233. (1 << FW_ASSERT_IND));
  234. do {
  235. RSI_GET_SDIO_INTERRUPT_TYPE(isr_status, isr_type);
  236. switch (isr_type) {
  237. case BUFFER_AVAILABLE:
  238. status = rsi_sdio_check_buffer_status(adapter,
  239. 0);
  240. if (status < 0)
  241. rsi_dbg(ERR_ZONE,
  242. "%s: Failed to check buffer status\n",
  243. __func__);
  244. rsi_sdio_ack_intr(common->priv,
  245. (1 << PKT_BUFF_AVAILABLE));
  246. rsi_set_event(&common->tx_thread.event);
  247. rsi_dbg(ISR_ZONE,
  248. "%s: ==> BUFFER_AVAILABLE <==\n",
  249. __func__);
  250. dev->buff_status_updated = true;
  251. break;
  252. case FIRMWARE_ASSERT_IND:
  253. rsi_dbg(ERR_ZONE,
  254. "%s: ==> FIRMWARE Assert <==\n",
  255. __func__);
  256. status = rsi_sdio_read_register(common->priv,
  257. SDIO_FW_STATUS_REG,
  258. &fw_status);
  259. if (status) {
  260. rsi_dbg(ERR_ZONE,
  261. "%s: Failed to read f/w reg\n",
  262. __func__);
  263. } else {
  264. rsi_dbg(ERR_ZONE,
  265. "%s: Firmware Status is 0x%x\n",
  266. __func__ , fw_status);
  267. rsi_sdio_ack_intr(common->priv,
  268. (1 << FW_ASSERT_IND));
  269. }
  270. common->fsm_state = FSM_CARD_NOT_READY;
  271. break;
  272. case MSDU_PACKET_PENDING:
  273. rsi_dbg(ISR_ZONE, "Pkt pending interrupt\n");
  274. dev->rx_info.total_sdio_msdu_pending_intr++;
  275. status = rsi_process_pkt(common);
  276. if (status) {
  277. rsi_dbg(ERR_ZONE,
  278. "%s: Failed to read pkt\n",
  279. __func__);
  280. mutex_unlock(&common->rx_lock);
  281. return;
  282. }
  283. break;
  284. default:
  285. rsi_sdio_ack_intr(common->priv, isr_status);
  286. dev->rx_info.total_sdio_unknown_intr++;
  287. isr_status = 0;
  288. rsi_dbg(ISR_ZONE,
  289. "Unknown Interrupt %x\n",
  290. isr_status);
  291. break;
  292. }
  293. isr_status ^= BIT(isr_type - 1);
  294. } while (isr_status);
  295. mutex_unlock(&common->rx_lock);
  296. } while (1);
  297. }
  298. /* This function is used to read buffer status register and
  299. * set relevant fields in rsi_91x_sdiodev struct.
  300. */
  301. int rsi_sdio_check_buffer_status(struct rsi_hw *adapter, u8 q_num)
  302. {
  303. struct rsi_common *common = adapter->priv;
  304. struct rsi_91x_sdiodev *dev =
  305. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  306. u8 buf_status = 0;
  307. int status = 0;
  308. static int counter = 4;
  309. if (!dev->buff_status_updated && counter) {
  310. counter--;
  311. goto out;
  312. }
  313. dev->buff_status_updated = false;
  314. status = rsi_sdio_read_register(common->priv,
  315. RSI_DEVICE_BUFFER_STATUS_REGISTER,
  316. &buf_status);
  317. if (status) {
  318. rsi_dbg(ERR_ZONE,
  319. "%s: Failed to read status register\n", __func__);
  320. return -1;
  321. }
  322. if (buf_status & (BIT(PKT_MGMT_BUFF_FULL))) {
  323. if (!dev->rx_info.mgmt_buffer_full)
  324. dev->rx_info.mgmt_buf_full_counter++;
  325. dev->rx_info.mgmt_buffer_full = true;
  326. } else {
  327. dev->rx_info.mgmt_buffer_full = false;
  328. }
  329. if (buf_status & (BIT(PKT_BUFF_FULL))) {
  330. if (!dev->rx_info.buffer_full)
  331. dev->rx_info.buf_full_counter++;
  332. dev->rx_info.buffer_full = true;
  333. } else {
  334. dev->rx_info.buffer_full = false;
  335. }
  336. if (buf_status & (BIT(PKT_BUFF_SEMI_FULL))) {
  337. if (!dev->rx_info.semi_buffer_full)
  338. dev->rx_info.buf_semi_full_counter++;
  339. dev->rx_info.semi_buffer_full = true;
  340. } else {
  341. dev->rx_info.semi_buffer_full = false;
  342. }
  343. if (dev->rx_info.mgmt_buffer_full || dev->rx_info.buf_full_counter)
  344. counter = 1;
  345. else
  346. counter = 4;
  347. out:
  348. if ((q_num == MGMT_SOFT_Q) && (dev->rx_info.mgmt_buffer_full))
  349. return QUEUE_FULL;
  350. if ((q_num < MGMT_SOFT_Q) && (dev->rx_info.buffer_full))
  351. return QUEUE_FULL;
  352. return QUEUE_NOT_FULL;
  353. }
  354. /**
  355. * rsi_sdio_determine_event_timeout() - This Function determines the event
  356. * timeout duration.
  357. * @adapter: Pointer to the adapter structure.
  358. *
  359. * Return: timeout duration is returned.
  360. */
  361. int rsi_sdio_determine_event_timeout(struct rsi_hw *adapter)
  362. {
  363. struct rsi_91x_sdiodev *dev =
  364. (struct rsi_91x_sdiodev *)adapter->rsi_dev;
  365. /* Once buffer full is seen, event timeout to occur every 2 msecs */
  366. if (dev->rx_info.buffer_full)
  367. return 2;
  368. return EVENT_WAIT_FOREVER;
  369. }