qeth_core_main.c 181 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2007, 2009
  4. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  5. * Frank Pavlic <fpavlic@de.ibm.com>,
  6. * Thomas Spatzier <tspat@de.ibm.com>,
  7. * Frank Blaschka <frank.blaschka@de.ibm.com>
  8. */
  9. #define KMSG_COMPONENT "qeth"
  10. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  11. #include <linux/compat.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/string.h>
  15. #include <linux/errno.h>
  16. #include <linux/kernel.h>
  17. #include <linux/ip.h>
  18. #include <linux/tcp.h>
  19. #include <linux/mii.h>
  20. #include <linux/kthread.h>
  21. #include <linux/slab.h>
  22. #include <linux/if_vlan.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/netdev_features.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/vmalloc.h>
  27. #include <net/iucv/af_iucv.h>
  28. #include <net/dsfield.h>
  29. #include <asm/ebcdic.h>
  30. #include <asm/chpid.h>
  31. #include <asm/io.h>
  32. #include <asm/sysinfo.h>
  33. #include <asm/diag.h>
  34. #include <asm/cio.h>
  35. #include <asm/ccwdev.h>
  36. #include <asm/cpcmd.h>
  37. #include "qeth_core.h"
  38. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  39. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  40. /* N P A M L V H */
  41. [QETH_DBF_SETUP] = {"qeth_setup",
  42. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  43. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  44. &debug_sprintf_view, NULL},
  45. [QETH_DBF_CTRL] = {"qeth_control",
  46. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  47. };
  48. EXPORT_SYMBOL_GPL(qeth_dbf);
  49. struct qeth_card_list_struct qeth_core_card_list;
  50. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  51. struct kmem_cache *qeth_core_header_cache;
  52. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  53. static struct kmem_cache *qeth_qdio_outbuf_cache;
  54. static struct device *qeth_core_root_dev;
  55. static struct lock_class_key qdio_out_skb_queue_key;
  56. static struct mutex qeth_mod_mutex;
  57. static void qeth_send_control_data_cb(struct qeth_channel *,
  58. struct qeth_cmd_buffer *);
  59. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  60. static void qeth_free_buffer_pool(struct qeth_card *);
  61. static int qeth_qdio_establish(struct qeth_card *);
  62. static void qeth_free_qdio_buffers(struct qeth_card *);
  63. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  64. struct qeth_qdio_out_buffer *buf,
  65. enum iucv_tx_notify notification);
  66. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  67. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  68. struct workqueue_struct *qeth_wq;
  69. EXPORT_SYMBOL_GPL(qeth_wq);
  70. int qeth_card_hw_is_reachable(struct qeth_card *card)
  71. {
  72. return (card->state == CARD_STATE_SOFTSETUP) ||
  73. (card->state == CARD_STATE_UP);
  74. }
  75. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  76. static void qeth_close_dev_handler(struct work_struct *work)
  77. {
  78. struct qeth_card *card;
  79. card = container_of(work, struct qeth_card, close_dev_work);
  80. QETH_CARD_TEXT(card, 2, "cldevhdl");
  81. rtnl_lock();
  82. dev_close(card->dev);
  83. rtnl_unlock();
  84. ccwgroup_set_offline(card->gdev);
  85. }
  86. void qeth_close_dev(struct qeth_card *card)
  87. {
  88. QETH_CARD_TEXT(card, 2, "cldevsubm");
  89. queue_work(qeth_wq, &card->close_dev_work);
  90. }
  91. EXPORT_SYMBOL_GPL(qeth_close_dev);
  92. static const char *qeth_get_cardname(struct qeth_card *card)
  93. {
  94. if (card->info.guestlan) {
  95. switch (card->info.type) {
  96. case QETH_CARD_TYPE_OSD:
  97. return " Virtual NIC QDIO";
  98. case QETH_CARD_TYPE_IQD:
  99. return " Virtual NIC Hiper";
  100. case QETH_CARD_TYPE_OSM:
  101. return " Virtual NIC QDIO - OSM";
  102. case QETH_CARD_TYPE_OSX:
  103. return " Virtual NIC QDIO - OSX";
  104. default:
  105. return " unknown";
  106. }
  107. } else {
  108. switch (card->info.type) {
  109. case QETH_CARD_TYPE_OSD:
  110. return " OSD Express";
  111. case QETH_CARD_TYPE_IQD:
  112. return " HiperSockets";
  113. case QETH_CARD_TYPE_OSN:
  114. return " OSN QDIO";
  115. case QETH_CARD_TYPE_OSM:
  116. return " OSM QDIO";
  117. case QETH_CARD_TYPE_OSX:
  118. return " OSX QDIO";
  119. default:
  120. return " unknown";
  121. }
  122. }
  123. return " n/a";
  124. }
  125. /* max length to be returned: 14 */
  126. const char *qeth_get_cardname_short(struct qeth_card *card)
  127. {
  128. if (card->info.guestlan) {
  129. switch (card->info.type) {
  130. case QETH_CARD_TYPE_OSD:
  131. return "Virt.NIC QDIO";
  132. case QETH_CARD_TYPE_IQD:
  133. return "Virt.NIC Hiper";
  134. case QETH_CARD_TYPE_OSM:
  135. return "Virt.NIC OSM";
  136. case QETH_CARD_TYPE_OSX:
  137. return "Virt.NIC OSX";
  138. default:
  139. return "unknown";
  140. }
  141. } else {
  142. switch (card->info.type) {
  143. case QETH_CARD_TYPE_OSD:
  144. switch (card->info.link_type) {
  145. case QETH_LINK_TYPE_FAST_ETH:
  146. return "OSD_100";
  147. case QETH_LINK_TYPE_HSTR:
  148. return "HSTR";
  149. case QETH_LINK_TYPE_GBIT_ETH:
  150. return "OSD_1000";
  151. case QETH_LINK_TYPE_10GBIT_ETH:
  152. return "OSD_10GIG";
  153. case QETH_LINK_TYPE_LANE_ETH100:
  154. return "OSD_FE_LANE";
  155. case QETH_LINK_TYPE_LANE_TR:
  156. return "OSD_TR_LANE";
  157. case QETH_LINK_TYPE_LANE_ETH1000:
  158. return "OSD_GbE_LANE";
  159. case QETH_LINK_TYPE_LANE:
  160. return "OSD_ATM_LANE";
  161. default:
  162. return "OSD_Express";
  163. }
  164. case QETH_CARD_TYPE_IQD:
  165. return "HiperSockets";
  166. case QETH_CARD_TYPE_OSN:
  167. return "OSN";
  168. case QETH_CARD_TYPE_OSM:
  169. return "OSM_1000";
  170. case QETH_CARD_TYPE_OSX:
  171. return "OSX_10GIG";
  172. default:
  173. return "unknown";
  174. }
  175. }
  176. return "n/a";
  177. }
  178. void qeth_set_recovery_task(struct qeth_card *card)
  179. {
  180. card->recovery_task = current;
  181. }
  182. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  183. void qeth_clear_recovery_task(struct qeth_card *card)
  184. {
  185. card->recovery_task = NULL;
  186. }
  187. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  188. static bool qeth_is_recovery_task(const struct qeth_card *card)
  189. {
  190. return card->recovery_task == current;
  191. }
  192. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  193. int clear_start_mask)
  194. {
  195. unsigned long flags;
  196. spin_lock_irqsave(&card->thread_mask_lock, flags);
  197. card->thread_allowed_mask = threads;
  198. if (clear_start_mask)
  199. card->thread_start_mask &= threads;
  200. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  201. wake_up(&card->wait_q);
  202. }
  203. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  204. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  205. {
  206. unsigned long flags;
  207. int rc = 0;
  208. spin_lock_irqsave(&card->thread_mask_lock, flags);
  209. rc = (card->thread_running_mask & threads);
  210. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  211. return rc;
  212. }
  213. EXPORT_SYMBOL_GPL(qeth_threads_running);
  214. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  215. {
  216. if (qeth_is_recovery_task(card))
  217. return 0;
  218. return wait_event_interruptible(card->wait_q,
  219. qeth_threads_running(card, threads) == 0);
  220. }
  221. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  222. void qeth_clear_working_pool_list(struct qeth_card *card)
  223. {
  224. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  225. QETH_CARD_TEXT(card, 5, "clwrklst");
  226. list_for_each_entry_safe(pool_entry, tmp,
  227. &card->qdio.in_buf_pool.entry_list, list){
  228. list_del(&pool_entry->list);
  229. }
  230. }
  231. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  232. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  233. {
  234. struct qeth_buffer_pool_entry *pool_entry;
  235. void *ptr;
  236. int i, j;
  237. QETH_CARD_TEXT(card, 5, "alocpool");
  238. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  239. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  240. if (!pool_entry) {
  241. qeth_free_buffer_pool(card);
  242. return -ENOMEM;
  243. }
  244. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  245. ptr = (void *) __get_free_page(GFP_KERNEL);
  246. if (!ptr) {
  247. while (j > 0)
  248. free_page((unsigned long)
  249. pool_entry->elements[--j]);
  250. kfree(pool_entry);
  251. qeth_free_buffer_pool(card);
  252. return -ENOMEM;
  253. }
  254. pool_entry->elements[j] = ptr;
  255. }
  256. list_add(&pool_entry->init_list,
  257. &card->qdio.init_pool.entry_list);
  258. }
  259. return 0;
  260. }
  261. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  262. {
  263. QETH_CARD_TEXT(card, 2, "realcbp");
  264. if ((card->state != CARD_STATE_DOWN) &&
  265. (card->state != CARD_STATE_RECOVER))
  266. return -EPERM;
  267. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  268. qeth_clear_working_pool_list(card);
  269. qeth_free_buffer_pool(card);
  270. card->qdio.in_buf_pool.buf_count = bufcnt;
  271. card->qdio.init_pool.buf_count = bufcnt;
  272. return qeth_alloc_buffer_pool(card);
  273. }
  274. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  275. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  276. {
  277. if (!q)
  278. return;
  279. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  280. kfree(q);
  281. }
  282. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  283. {
  284. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  285. int i;
  286. if (!q)
  287. return NULL;
  288. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  289. kfree(q);
  290. return NULL;
  291. }
  292. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  293. q->bufs[i].buffer = q->qdio_bufs[i];
  294. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  295. return q;
  296. }
  297. static int qeth_cq_init(struct qeth_card *card)
  298. {
  299. int rc;
  300. if (card->options.cq == QETH_CQ_ENABLED) {
  301. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  302. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  303. QDIO_MAX_BUFFERS_PER_Q);
  304. card->qdio.c_q->next_buf_to_init = 127;
  305. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  306. card->qdio.no_in_queues - 1, 0,
  307. 127);
  308. if (rc) {
  309. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  310. goto out;
  311. }
  312. }
  313. rc = 0;
  314. out:
  315. return rc;
  316. }
  317. static int qeth_alloc_cq(struct qeth_card *card)
  318. {
  319. int rc;
  320. if (card->options.cq == QETH_CQ_ENABLED) {
  321. int i;
  322. struct qdio_outbuf_state *outbuf_states;
  323. QETH_DBF_TEXT(SETUP, 2, "cqon");
  324. card->qdio.c_q = qeth_alloc_qdio_queue();
  325. if (!card->qdio.c_q) {
  326. rc = -1;
  327. goto kmsg_out;
  328. }
  329. card->qdio.no_in_queues = 2;
  330. card->qdio.out_bufstates =
  331. kcalloc(card->qdio.no_out_queues *
  332. QDIO_MAX_BUFFERS_PER_Q,
  333. sizeof(struct qdio_outbuf_state),
  334. GFP_KERNEL);
  335. outbuf_states = card->qdio.out_bufstates;
  336. if (outbuf_states == NULL) {
  337. rc = -1;
  338. goto free_cq_out;
  339. }
  340. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  341. card->qdio.out_qs[i]->bufstates = outbuf_states;
  342. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  343. }
  344. } else {
  345. QETH_DBF_TEXT(SETUP, 2, "nocq");
  346. card->qdio.c_q = NULL;
  347. card->qdio.no_in_queues = 1;
  348. }
  349. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  350. rc = 0;
  351. out:
  352. return rc;
  353. free_cq_out:
  354. qeth_free_qdio_queue(card->qdio.c_q);
  355. card->qdio.c_q = NULL;
  356. kmsg_out:
  357. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  358. goto out;
  359. }
  360. static void qeth_free_cq(struct qeth_card *card)
  361. {
  362. if (card->qdio.c_q) {
  363. --card->qdio.no_in_queues;
  364. qeth_free_qdio_queue(card->qdio.c_q);
  365. card->qdio.c_q = NULL;
  366. }
  367. kfree(card->qdio.out_bufstates);
  368. card->qdio.out_bufstates = NULL;
  369. }
  370. static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  371. int delayed)
  372. {
  373. enum iucv_tx_notify n;
  374. switch (sbalf15) {
  375. case 0:
  376. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  377. break;
  378. case 4:
  379. case 16:
  380. case 17:
  381. case 18:
  382. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  383. TX_NOTIFY_UNREACHABLE;
  384. break;
  385. default:
  386. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  387. TX_NOTIFY_GENERALERROR;
  388. break;
  389. }
  390. return n;
  391. }
  392. static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
  393. int forced_cleanup)
  394. {
  395. if (q->card->options.cq != QETH_CQ_ENABLED)
  396. return;
  397. if (q->bufs[bidx]->next_pending != NULL) {
  398. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  399. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  400. while (c) {
  401. if (forced_cleanup ||
  402. atomic_read(&c->state) ==
  403. QETH_QDIO_BUF_HANDLED_DELAYED) {
  404. struct qeth_qdio_out_buffer *f = c;
  405. QETH_CARD_TEXT(f->q->card, 5, "fp");
  406. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  407. /* release here to avoid interleaving between
  408. outbound tasklet and inbound tasklet
  409. regarding notifications and lifecycle */
  410. qeth_release_skbs(c);
  411. c = f->next_pending;
  412. WARN_ON_ONCE(head->next_pending != f);
  413. head->next_pending = c;
  414. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  415. } else {
  416. head = c;
  417. c = c->next_pending;
  418. }
  419. }
  420. }
  421. }
  422. static void qeth_qdio_handle_aob(struct qeth_card *card,
  423. unsigned long phys_aob_addr)
  424. {
  425. struct qaob *aob;
  426. struct qeth_qdio_out_buffer *buffer;
  427. enum iucv_tx_notify notification;
  428. unsigned int i;
  429. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  430. QETH_CARD_TEXT(card, 5, "haob");
  431. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  432. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  433. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  434. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  435. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  436. notification = TX_NOTIFY_OK;
  437. } else {
  438. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  439. QETH_QDIO_BUF_PENDING);
  440. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  441. notification = TX_NOTIFY_DELAYED_OK;
  442. }
  443. if (aob->aorc != 0) {
  444. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  445. notification = qeth_compute_cq_notification(aob->aorc, 1);
  446. }
  447. qeth_notify_skbs(buffer->q, buffer, notification);
  448. /* Free dangling allocations. The attached skbs are handled by
  449. * qeth_cleanup_handled_pending().
  450. */
  451. for (i = 0;
  452. i < aob->sb_count && i < QETH_MAX_BUFFER_ELEMENTS(card);
  453. i++) {
  454. if (aob->sba[i] && buffer->is_header[i])
  455. kmem_cache_free(qeth_core_header_cache,
  456. (void *) aob->sba[i]);
  457. }
  458. atomic_set(&buffer->state, QETH_QDIO_BUF_HANDLED_DELAYED);
  459. qdio_release_aob(aob);
  460. }
  461. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  462. {
  463. return card->options.cq == QETH_CQ_ENABLED &&
  464. card->qdio.c_q != NULL &&
  465. queue != 0 &&
  466. queue == card->qdio.no_in_queues - 1;
  467. }
  468. static void qeth_setup_ccw(struct ccw1 *ccw, u8 cmd_code, u32 len, void *data)
  469. {
  470. ccw->cmd_code = cmd_code;
  471. ccw->flags = CCW_FLAG_SLI;
  472. ccw->count = len;
  473. ccw->cda = (__u32) __pa(data);
  474. }
  475. static int __qeth_issue_next_read(struct qeth_card *card)
  476. {
  477. struct qeth_channel *channel = &card->read;
  478. struct qeth_cmd_buffer *iob;
  479. int rc;
  480. QETH_CARD_TEXT(card, 5, "issnxrd");
  481. if (channel->state != CH_STATE_UP)
  482. return -EIO;
  483. iob = qeth_get_buffer(channel);
  484. if (!iob) {
  485. dev_warn(&card->gdev->dev, "The qeth device driver "
  486. "failed to recover an error on the device\n");
  487. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  488. "available\n", dev_name(&card->gdev->dev));
  489. return -ENOMEM;
  490. }
  491. qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
  492. QETH_CARD_TEXT(card, 6, "noirqpnd");
  493. rc = ccw_device_start(channel->ccwdev, channel->ccw,
  494. (addr_t) iob, 0, 0);
  495. if (rc) {
  496. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  497. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  498. atomic_set(&channel->irq_pending, 0);
  499. qeth_release_buffer(channel, iob);
  500. card->read_or_write_problem = 1;
  501. qeth_schedule_recovery(card);
  502. wake_up(&card->wait_q);
  503. }
  504. return rc;
  505. }
  506. static int qeth_issue_next_read(struct qeth_card *card)
  507. {
  508. int ret;
  509. spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  510. ret = __qeth_issue_next_read(card);
  511. spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  512. return ret;
  513. }
  514. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  515. {
  516. struct qeth_reply *reply;
  517. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  518. if (reply) {
  519. refcount_set(&reply->refcnt, 1);
  520. atomic_set(&reply->received, 0);
  521. reply->card = card;
  522. }
  523. return reply;
  524. }
  525. static void qeth_get_reply(struct qeth_reply *reply)
  526. {
  527. refcount_inc(&reply->refcnt);
  528. }
  529. static void qeth_put_reply(struct qeth_reply *reply)
  530. {
  531. if (refcount_dec_and_test(&reply->refcnt))
  532. kfree(reply);
  533. }
  534. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  535. struct qeth_card *card)
  536. {
  537. const char *ipa_name;
  538. int com = cmd->hdr.command;
  539. ipa_name = qeth_get_ipa_cmd_name(com);
  540. if (rc)
  541. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  542. "x%X \"%s\"\n",
  543. ipa_name, com, dev_name(&card->gdev->dev),
  544. QETH_CARD_IFNAME(card), rc,
  545. qeth_get_ipa_msg(rc));
  546. else
  547. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  548. ipa_name, com, dev_name(&card->gdev->dev),
  549. QETH_CARD_IFNAME(card));
  550. }
  551. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  552. struct qeth_cmd_buffer *iob)
  553. {
  554. struct qeth_ipa_cmd *cmd = NULL;
  555. QETH_CARD_TEXT(card, 5, "chkipad");
  556. if (IS_IPA(iob->data)) {
  557. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  558. if (IS_IPA_REPLY(cmd)) {
  559. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  560. cmd->hdr.command != IPA_CMD_DELCCID &&
  561. cmd->hdr.command != IPA_CMD_MODCCID &&
  562. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  563. qeth_issue_ipa_msg(cmd,
  564. cmd->hdr.return_code, card);
  565. return cmd;
  566. } else {
  567. switch (cmd->hdr.command) {
  568. case IPA_CMD_STOPLAN:
  569. if (cmd->hdr.return_code ==
  570. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  571. dev_err(&card->gdev->dev,
  572. "Interface %s is down because the "
  573. "adjacent port is no longer in "
  574. "reflective relay mode\n",
  575. QETH_CARD_IFNAME(card));
  576. qeth_close_dev(card);
  577. } else {
  578. dev_warn(&card->gdev->dev,
  579. "The link for interface %s on CHPID"
  580. " 0x%X failed\n",
  581. QETH_CARD_IFNAME(card),
  582. card->info.chpid);
  583. qeth_issue_ipa_msg(cmd,
  584. cmd->hdr.return_code, card);
  585. }
  586. card->lan_online = 0;
  587. netif_carrier_off(card->dev);
  588. return NULL;
  589. case IPA_CMD_STARTLAN:
  590. dev_info(&card->gdev->dev,
  591. "The link for %s on CHPID 0x%X has"
  592. " been restored\n",
  593. QETH_CARD_IFNAME(card),
  594. card->info.chpid);
  595. netif_carrier_on(card->dev);
  596. card->lan_online = 1;
  597. if (card->info.hwtrap)
  598. card->info.hwtrap = 2;
  599. qeth_schedule_recovery(card);
  600. return NULL;
  601. case IPA_CMD_SETBRIDGEPORT_IQD:
  602. case IPA_CMD_SETBRIDGEPORT_OSA:
  603. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  604. if (card->discipline->control_event_handler
  605. (card, cmd))
  606. return cmd;
  607. else
  608. return NULL;
  609. case IPA_CMD_MODCCID:
  610. return cmd;
  611. case IPA_CMD_REGISTER_LOCAL_ADDR:
  612. QETH_CARD_TEXT(card, 3, "irla");
  613. break;
  614. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  615. QETH_CARD_TEXT(card, 3, "urla");
  616. break;
  617. default:
  618. QETH_DBF_MESSAGE(2, "Received data is IPA "
  619. "but not a reply!\n");
  620. break;
  621. }
  622. }
  623. }
  624. return cmd;
  625. }
  626. void qeth_clear_ipacmd_list(struct qeth_card *card)
  627. {
  628. struct qeth_reply *reply, *r;
  629. unsigned long flags;
  630. QETH_CARD_TEXT(card, 4, "clipalst");
  631. spin_lock_irqsave(&card->lock, flags);
  632. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  633. qeth_get_reply(reply);
  634. reply->rc = -EIO;
  635. atomic_inc(&reply->received);
  636. list_del_init(&reply->list);
  637. wake_up(&reply->wait_q);
  638. qeth_put_reply(reply);
  639. }
  640. spin_unlock_irqrestore(&card->lock, flags);
  641. }
  642. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  643. static int qeth_check_idx_response(struct qeth_card *card,
  644. unsigned char *buffer)
  645. {
  646. if (!buffer)
  647. return 0;
  648. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  649. if ((buffer[2] & 0xc0) == 0xc0) {
  650. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
  651. buffer[4]);
  652. QETH_CARD_TEXT(card, 2, "ckidxres");
  653. QETH_CARD_TEXT(card, 2, " idxterm");
  654. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  655. if (buffer[4] == 0xf6) {
  656. dev_err(&card->gdev->dev,
  657. "The qeth device is not configured "
  658. "for the OSI layer required by z/VM\n");
  659. return -EPERM;
  660. }
  661. return -EIO;
  662. }
  663. return 0;
  664. }
  665. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  666. {
  667. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  668. dev_get_drvdata(&cdev->dev))->dev);
  669. return card;
  670. }
  671. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  672. {
  673. __u8 index;
  674. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  675. index = channel->io_buf_no;
  676. do {
  677. if (channel->iob[index].state == BUF_STATE_FREE) {
  678. channel->iob[index].state = BUF_STATE_LOCKED;
  679. channel->io_buf_no = (channel->io_buf_no + 1) %
  680. QETH_CMD_BUFFER_NO;
  681. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  682. return channel->iob + index;
  683. }
  684. index = (index + 1) % QETH_CMD_BUFFER_NO;
  685. } while (index != channel->io_buf_no);
  686. return NULL;
  687. }
  688. void qeth_release_buffer(struct qeth_channel *channel,
  689. struct qeth_cmd_buffer *iob)
  690. {
  691. unsigned long flags;
  692. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  693. spin_lock_irqsave(&channel->iob_lock, flags);
  694. memset(iob->data, 0, QETH_BUFSIZE);
  695. iob->state = BUF_STATE_FREE;
  696. iob->callback = qeth_send_control_data_cb;
  697. iob->rc = 0;
  698. spin_unlock_irqrestore(&channel->iob_lock, flags);
  699. wake_up(&channel->wait_q);
  700. }
  701. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  702. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  703. {
  704. struct qeth_cmd_buffer *buffer = NULL;
  705. unsigned long flags;
  706. spin_lock_irqsave(&channel->iob_lock, flags);
  707. buffer = __qeth_get_buffer(channel);
  708. spin_unlock_irqrestore(&channel->iob_lock, flags);
  709. return buffer;
  710. }
  711. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  712. {
  713. struct qeth_cmd_buffer *buffer;
  714. wait_event(channel->wait_q,
  715. ((buffer = qeth_get_buffer(channel)) != NULL));
  716. return buffer;
  717. }
  718. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  719. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  720. {
  721. int cnt;
  722. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  723. qeth_release_buffer(channel, &channel->iob[cnt]);
  724. channel->io_buf_no = 0;
  725. }
  726. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  727. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  728. struct qeth_cmd_buffer *iob)
  729. {
  730. struct qeth_card *card;
  731. struct qeth_reply *reply, *r;
  732. struct qeth_ipa_cmd *cmd;
  733. unsigned long flags;
  734. int keep_reply;
  735. int rc = 0;
  736. card = CARD_FROM_CDEV(channel->ccwdev);
  737. QETH_CARD_TEXT(card, 4, "sndctlcb");
  738. rc = qeth_check_idx_response(card, iob->data);
  739. switch (rc) {
  740. case 0:
  741. break;
  742. case -EIO:
  743. qeth_clear_ipacmd_list(card);
  744. qeth_schedule_recovery(card);
  745. /* fall through */
  746. default:
  747. goto out;
  748. }
  749. cmd = qeth_check_ipa_data(card, iob);
  750. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  751. goto out;
  752. /*in case of OSN : check if cmd is set */
  753. if (card->info.type == QETH_CARD_TYPE_OSN &&
  754. cmd &&
  755. cmd->hdr.command != IPA_CMD_STARTLAN &&
  756. card->osn_info.assist_cb != NULL) {
  757. card->osn_info.assist_cb(card->dev, cmd);
  758. goto out;
  759. }
  760. spin_lock_irqsave(&card->lock, flags);
  761. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  762. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  763. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  764. qeth_get_reply(reply);
  765. list_del_init(&reply->list);
  766. spin_unlock_irqrestore(&card->lock, flags);
  767. keep_reply = 0;
  768. if (reply->callback != NULL) {
  769. if (cmd) {
  770. reply->offset = (__u16)((char *)cmd -
  771. (char *)iob->data);
  772. keep_reply = reply->callback(card,
  773. reply,
  774. (unsigned long)cmd);
  775. } else
  776. keep_reply = reply->callback(card,
  777. reply,
  778. (unsigned long)iob);
  779. }
  780. if (cmd)
  781. reply->rc = (u16) cmd->hdr.return_code;
  782. else if (iob->rc)
  783. reply->rc = iob->rc;
  784. if (keep_reply) {
  785. spin_lock_irqsave(&card->lock, flags);
  786. list_add_tail(&reply->list,
  787. &card->cmd_waiter_list);
  788. spin_unlock_irqrestore(&card->lock, flags);
  789. } else {
  790. atomic_inc(&reply->received);
  791. wake_up(&reply->wait_q);
  792. }
  793. qeth_put_reply(reply);
  794. goto out;
  795. }
  796. }
  797. spin_unlock_irqrestore(&card->lock, flags);
  798. out:
  799. memcpy(&card->seqno.pdu_hdr_ack,
  800. QETH_PDU_HEADER_SEQ_NO(iob->data),
  801. QETH_SEQ_NO_LENGTH);
  802. qeth_release_buffer(channel, iob);
  803. }
  804. static int qeth_set_thread_start_bit(struct qeth_card *card,
  805. unsigned long thread)
  806. {
  807. unsigned long flags;
  808. spin_lock_irqsave(&card->thread_mask_lock, flags);
  809. if (!(card->thread_allowed_mask & thread) ||
  810. (card->thread_start_mask & thread)) {
  811. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  812. return -EPERM;
  813. }
  814. card->thread_start_mask |= thread;
  815. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  816. return 0;
  817. }
  818. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  819. {
  820. unsigned long flags;
  821. spin_lock_irqsave(&card->thread_mask_lock, flags);
  822. card->thread_start_mask &= ~thread;
  823. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  824. wake_up(&card->wait_q);
  825. }
  826. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  827. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  828. {
  829. unsigned long flags;
  830. spin_lock_irqsave(&card->thread_mask_lock, flags);
  831. card->thread_running_mask &= ~thread;
  832. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  833. wake_up_all(&card->wait_q);
  834. }
  835. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  836. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  837. {
  838. unsigned long flags;
  839. int rc = 0;
  840. spin_lock_irqsave(&card->thread_mask_lock, flags);
  841. if (card->thread_start_mask & thread) {
  842. if ((card->thread_allowed_mask & thread) &&
  843. !(card->thread_running_mask & thread)) {
  844. rc = 1;
  845. card->thread_start_mask &= ~thread;
  846. card->thread_running_mask |= thread;
  847. } else
  848. rc = -EPERM;
  849. }
  850. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  851. return rc;
  852. }
  853. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  854. {
  855. int rc = 0;
  856. wait_event(card->wait_q,
  857. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  858. return rc;
  859. }
  860. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  861. void qeth_schedule_recovery(struct qeth_card *card)
  862. {
  863. QETH_CARD_TEXT(card, 2, "startrec");
  864. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  865. schedule_work(&card->kernel_thread_starter);
  866. }
  867. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  868. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  869. {
  870. int dstat, cstat;
  871. char *sense;
  872. struct qeth_card *card;
  873. sense = (char *) irb->ecw;
  874. cstat = irb->scsw.cmd.cstat;
  875. dstat = irb->scsw.cmd.dstat;
  876. card = CARD_FROM_CDEV(cdev);
  877. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  878. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  879. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  880. QETH_CARD_TEXT(card, 2, "CGENCHK");
  881. dev_warn(&cdev->dev, "The qeth device driver "
  882. "failed to recover an error on the device\n");
  883. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  884. dev_name(&cdev->dev), dstat, cstat);
  885. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  886. 16, 1, irb, 64, 1);
  887. return 1;
  888. }
  889. if (dstat & DEV_STAT_UNIT_CHECK) {
  890. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  891. SENSE_RESETTING_EVENT_FLAG) {
  892. QETH_CARD_TEXT(card, 2, "REVIND");
  893. return 1;
  894. }
  895. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  896. SENSE_COMMAND_REJECT_FLAG) {
  897. QETH_CARD_TEXT(card, 2, "CMDREJi");
  898. return 1;
  899. }
  900. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  901. QETH_CARD_TEXT(card, 2, "AFFE");
  902. return 1;
  903. }
  904. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  905. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  906. return 0;
  907. }
  908. QETH_CARD_TEXT(card, 2, "DGENCHK");
  909. return 1;
  910. }
  911. return 0;
  912. }
  913. static long __qeth_check_irb_error(struct ccw_device *cdev,
  914. unsigned long intparm, struct irb *irb)
  915. {
  916. struct qeth_card *card;
  917. card = CARD_FROM_CDEV(cdev);
  918. if (!card || !IS_ERR(irb))
  919. return 0;
  920. switch (PTR_ERR(irb)) {
  921. case -EIO:
  922. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  923. dev_name(&cdev->dev));
  924. QETH_CARD_TEXT(card, 2, "ckirberr");
  925. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  926. break;
  927. case -ETIMEDOUT:
  928. dev_warn(&cdev->dev, "A hardware operation timed out"
  929. " on the device\n");
  930. QETH_CARD_TEXT(card, 2, "ckirberr");
  931. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  932. if (intparm == QETH_RCD_PARM) {
  933. if (card->data.ccwdev == cdev) {
  934. card->data.state = CH_STATE_DOWN;
  935. wake_up(&card->wait_q);
  936. }
  937. }
  938. break;
  939. default:
  940. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  941. dev_name(&cdev->dev), PTR_ERR(irb));
  942. QETH_CARD_TEXT(card, 2, "ckirberr");
  943. QETH_CARD_TEXT(card, 2, " rc???");
  944. }
  945. return PTR_ERR(irb);
  946. }
  947. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  948. struct irb *irb)
  949. {
  950. int rc;
  951. int cstat, dstat;
  952. struct qeth_cmd_buffer *iob = NULL;
  953. struct qeth_channel *channel;
  954. struct qeth_card *card;
  955. card = CARD_FROM_CDEV(cdev);
  956. if (!card)
  957. return;
  958. QETH_CARD_TEXT(card, 5, "irq");
  959. if (card->read.ccwdev == cdev) {
  960. channel = &card->read;
  961. QETH_CARD_TEXT(card, 5, "read");
  962. } else if (card->write.ccwdev == cdev) {
  963. channel = &card->write;
  964. QETH_CARD_TEXT(card, 5, "write");
  965. } else {
  966. channel = &card->data;
  967. QETH_CARD_TEXT(card, 5, "data");
  968. }
  969. if (qeth_intparm_is_iob(intparm))
  970. iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  971. if (__qeth_check_irb_error(cdev, intparm, irb)) {
  972. /* IO was terminated, free its resources. */
  973. if (iob)
  974. qeth_release_buffer(iob->channel, iob);
  975. atomic_set(&channel->irq_pending, 0);
  976. wake_up(&card->wait_q);
  977. return;
  978. }
  979. atomic_set(&channel->irq_pending, 0);
  980. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  981. channel->state = CH_STATE_STOPPED;
  982. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  983. channel->state = CH_STATE_HALTED;
  984. /*let's wake up immediately on data channel*/
  985. if ((channel == &card->data) && (intparm != 0) &&
  986. (intparm != QETH_RCD_PARM))
  987. goto out;
  988. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  989. QETH_CARD_TEXT(card, 6, "clrchpar");
  990. /* we don't have to handle this further */
  991. intparm = 0;
  992. }
  993. if (intparm == QETH_HALT_CHANNEL_PARM) {
  994. QETH_CARD_TEXT(card, 6, "hltchpar");
  995. /* we don't have to handle this further */
  996. intparm = 0;
  997. }
  998. cstat = irb->scsw.cmd.cstat;
  999. dstat = irb->scsw.cmd.dstat;
  1000. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1001. (dstat & DEV_STAT_UNIT_CHECK) ||
  1002. (cstat)) {
  1003. if (irb->esw.esw0.erw.cons) {
  1004. dev_warn(&channel->ccwdev->dev,
  1005. "The qeth device driver failed to recover "
  1006. "an error on the device\n");
  1007. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1008. "0x%X dstat 0x%X\n",
  1009. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1010. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1011. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1012. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1013. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1014. }
  1015. if (intparm == QETH_RCD_PARM) {
  1016. channel->state = CH_STATE_DOWN;
  1017. goto out;
  1018. }
  1019. rc = qeth_get_problem(cdev, irb);
  1020. if (rc) {
  1021. card->read_or_write_problem = 1;
  1022. if (iob)
  1023. qeth_release_buffer(iob->channel, iob);
  1024. qeth_clear_ipacmd_list(card);
  1025. qeth_schedule_recovery(card);
  1026. goto out;
  1027. }
  1028. }
  1029. if (intparm == QETH_RCD_PARM) {
  1030. channel->state = CH_STATE_RCD_DONE;
  1031. goto out;
  1032. }
  1033. if (channel == &card->data)
  1034. return;
  1035. if (channel == &card->read &&
  1036. channel->state == CH_STATE_UP)
  1037. __qeth_issue_next_read(card);
  1038. if (iob && iob->callback)
  1039. iob->callback(iob->channel, iob);
  1040. out:
  1041. wake_up(&card->wait_q);
  1042. return;
  1043. }
  1044. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1045. struct qeth_qdio_out_buffer *buf,
  1046. enum iucv_tx_notify notification)
  1047. {
  1048. struct sk_buff *skb;
  1049. if (skb_queue_empty(&buf->skb_list))
  1050. goto out;
  1051. skb = skb_peek(&buf->skb_list);
  1052. while (skb) {
  1053. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1054. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1055. if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1056. if (skb->sk) {
  1057. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1058. iucv->sk_txnotify(skb, notification);
  1059. }
  1060. }
  1061. if (skb_queue_is_last(&buf->skb_list, skb))
  1062. skb = NULL;
  1063. else
  1064. skb = skb_queue_next(&buf->skb_list, skb);
  1065. }
  1066. out:
  1067. return;
  1068. }
  1069. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1070. {
  1071. struct sk_buff *skb;
  1072. struct iucv_sock *iucv;
  1073. int notify_general_error = 0;
  1074. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1075. notify_general_error = 1;
  1076. /* release may never happen from within CQ tasklet scope */
  1077. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1078. skb = skb_dequeue(&buf->skb_list);
  1079. while (skb) {
  1080. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1081. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1082. if (notify_general_error &&
  1083. be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1084. if (skb->sk) {
  1085. iucv = iucv_sk(skb->sk);
  1086. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1087. }
  1088. }
  1089. refcount_dec(&skb->users);
  1090. dev_kfree_skb_any(skb);
  1091. skb = skb_dequeue(&buf->skb_list);
  1092. }
  1093. }
  1094. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1095. struct qeth_qdio_out_buffer *buf)
  1096. {
  1097. int i;
  1098. /* is PCI flag set on buffer? */
  1099. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1100. atomic_dec(&queue->set_pci_flags_count);
  1101. qeth_release_skbs(buf);
  1102. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1103. if (buf->buffer->element[i].addr && buf->is_header[i])
  1104. kmem_cache_free(qeth_core_header_cache,
  1105. buf->buffer->element[i].addr);
  1106. buf->is_header[i] = 0;
  1107. }
  1108. qeth_scrub_qdio_buffer(buf->buffer,
  1109. QETH_MAX_BUFFER_ELEMENTS(queue->card));
  1110. buf->next_element_to_fill = 0;
  1111. atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
  1112. }
  1113. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1114. {
  1115. int j;
  1116. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1117. if (!q->bufs[j])
  1118. continue;
  1119. qeth_cleanup_handled_pending(q, j, 1);
  1120. qeth_clear_output_buffer(q, q->bufs[j]);
  1121. if (free) {
  1122. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1123. q->bufs[j] = NULL;
  1124. }
  1125. }
  1126. }
  1127. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1128. {
  1129. int i;
  1130. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1131. /* clear outbound buffers to free skbs */
  1132. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1133. if (card->qdio.out_qs[i]) {
  1134. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1135. }
  1136. }
  1137. }
  1138. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1139. static void qeth_free_buffer_pool(struct qeth_card *card)
  1140. {
  1141. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1142. int i = 0;
  1143. list_for_each_entry_safe(pool_entry, tmp,
  1144. &card->qdio.init_pool.entry_list, init_list){
  1145. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1146. free_page((unsigned long)pool_entry->elements[i]);
  1147. list_del(&pool_entry->init_list);
  1148. kfree(pool_entry);
  1149. }
  1150. }
  1151. static void qeth_clean_channel(struct qeth_channel *channel)
  1152. {
  1153. struct ccw_device *cdev = channel->ccwdev;
  1154. int cnt;
  1155. QETH_DBF_TEXT(SETUP, 2, "freech");
  1156. spin_lock_irq(get_ccwdev_lock(cdev));
  1157. cdev->handler = NULL;
  1158. spin_unlock_irq(get_ccwdev_lock(cdev));
  1159. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1160. kfree(channel->iob[cnt].data);
  1161. kfree(channel->ccw);
  1162. }
  1163. static int qeth_setup_channel(struct qeth_channel *channel, bool alloc_buffers)
  1164. {
  1165. struct ccw_device *cdev = channel->ccwdev;
  1166. int cnt;
  1167. QETH_DBF_TEXT(SETUP, 2, "setupch");
  1168. channel->ccw = kmalloc(sizeof(struct ccw1), GFP_KERNEL | GFP_DMA);
  1169. if (!channel->ccw)
  1170. return -ENOMEM;
  1171. channel->state = CH_STATE_DOWN;
  1172. atomic_set(&channel->irq_pending, 0);
  1173. init_waitqueue_head(&channel->wait_q);
  1174. spin_lock_irq(get_ccwdev_lock(cdev));
  1175. cdev->handler = qeth_irq;
  1176. spin_unlock_irq(get_ccwdev_lock(cdev));
  1177. if (!alloc_buffers)
  1178. return 0;
  1179. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  1180. channel->iob[cnt].data =
  1181. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  1182. if (channel->iob[cnt].data == NULL)
  1183. break;
  1184. channel->iob[cnt].state = BUF_STATE_FREE;
  1185. channel->iob[cnt].channel = channel;
  1186. channel->iob[cnt].callback = qeth_send_control_data_cb;
  1187. channel->iob[cnt].rc = 0;
  1188. }
  1189. if (cnt < QETH_CMD_BUFFER_NO) {
  1190. qeth_clean_channel(channel);
  1191. return -ENOMEM;
  1192. }
  1193. channel->io_buf_no = 0;
  1194. spin_lock_init(&channel->iob_lock);
  1195. return 0;
  1196. }
  1197. static void qeth_set_single_write_queues(struct qeth_card *card)
  1198. {
  1199. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1200. (card->qdio.no_out_queues == 4))
  1201. qeth_free_qdio_buffers(card);
  1202. card->qdio.no_out_queues = 1;
  1203. if (card->qdio.default_out_queue != 0)
  1204. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1205. card->qdio.default_out_queue = 0;
  1206. }
  1207. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1208. {
  1209. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1210. (card->qdio.no_out_queues == 1)) {
  1211. qeth_free_qdio_buffers(card);
  1212. card->qdio.default_out_queue = 2;
  1213. }
  1214. card->qdio.no_out_queues = 4;
  1215. }
  1216. static int qeth_update_from_chp_desc(struct qeth_card *card)
  1217. {
  1218. struct ccw_device *ccwdev;
  1219. struct channel_path_desc_fmt0 *chp_dsc;
  1220. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1221. ccwdev = card->data.ccwdev;
  1222. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1223. if (!chp_dsc)
  1224. return -ENOMEM;
  1225. card->info.func_level = 0x4100 + chp_dsc->desc;
  1226. if (card->info.type == QETH_CARD_TYPE_IQD)
  1227. goto out;
  1228. /* CHPP field bit 6 == 1 -> single queue */
  1229. if ((chp_dsc->chpp & 0x02) == 0x02)
  1230. qeth_set_single_write_queues(card);
  1231. else
  1232. qeth_set_multiple_write_queues(card);
  1233. out:
  1234. kfree(chp_dsc);
  1235. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1236. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1237. return 0;
  1238. }
  1239. static void qeth_init_qdio_info(struct qeth_card *card)
  1240. {
  1241. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1242. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1243. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1244. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1245. card->qdio.no_out_queues = QETH_MAX_QUEUES;
  1246. /* inbound */
  1247. card->qdio.no_in_queues = 1;
  1248. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1249. if (card->info.type == QETH_CARD_TYPE_IQD)
  1250. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1251. else
  1252. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1253. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1254. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1255. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1256. }
  1257. static void qeth_set_initial_options(struct qeth_card *card)
  1258. {
  1259. card->options.route4.type = NO_ROUTER;
  1260. card->options.route6.type = NO_ROUTER;
  1261. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1262. card->options.isolation = ISOLATION_MODE_NONE;
  1263. card->options.cq = QETH_CQ_DISABLED;
  1264. }
  1265. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1266. {
  1267. unsigned long flags;
  1268. int rc = 0;
  1269. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1270. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1271. (u8) card->thread_start_mask,
  1272. (u8) card->thread_allowed_mask,
  1273. (u8) card->thread_running_mask);
  1274. rc = (card->thread_start_mask & thread);
  1275. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1276. return rc;
  1277. }
  1278. static void qeth_start_kernel_thread(struct work_struct *work)
  1279. {
  1280. struct task_struct *ts;
  1281. struct qeth_card *card = container_of(work, struct qeth_card,
  1282. kernel_thread_starter);
  1283. QETH_CARD_TEXT(card , 2, "strthrd");
  1284. if (card->read.state != CH_STATE_UP &&
  1285. card->write.state != CH_STATE_UP)
  1286. return;
  1287. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1288. ts = kthread_run(card->discipline->recover, (void *)card,
  1289. "qeth_recover");
  1290. if (IS_ERR(ts)) {
  1291. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1292. qeth_clear_thread_running_bit(card,
  1293. QETH_RECOVER_THREAD);
  1294. }
  1295. }
  1296. }
  1297. static void qeth_buffer_reclaim_work(struct work_struct *);
  1298. static void qeth_setup_card(struct qeth_card *card)
  1299. {
  1300. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1301. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1302. card->info.type = CARD_RDEV(card)->id.driver_info;
  1303. card->state = CARD_STATE_DOWN;
  1304. spin_lock_init(&card->mclock);
  1305. spin_lock_init(&card->lock);
  1306. spin_lock_init(&card->ip_lock);
  1307. spin_lock_init(&card->thread_mask_lock);
  1308. mutex_init(&card->conf_mutex);
  1309. mutex_init(&card->discipline_mutex);
  1310. mutex_init(&card->vid_list_mutex);
  1311. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1312. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1313. init_waitqueue_head(&card->wait_q);
  1314. qeth_set_initial_options(card);
  1315. /* IP address takeover */
  1316. INIT_LIST_HEAD(&card->ipato.entries);
  1317. qeth_init_qdio_info(card);
  1318. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1319. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1320. }
  1321. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1322. {
  1323. struct qeth_card *card = container_of(slr, struct qeth_card,
  1324. qeth_service_level);
  1325. if (card->info.mcl_level[0])
  1326. seq_printf(m, "qeth: %s firmware level %s\n",
  1327. CARD_BUS_ID(card), card->info.mcl_level);
  1328. }
  1329. static struct qeth_card *qeth_alloc_card(struct ccwgroup_device *gdev)
  1330. {
  1331. struct qeth_card *card;
  1332. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1333. card = kzalloc(sizeof(*card), GFP_KERNEL);
  1334. if (!card)
  1335. goto out;
  1336. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1337. card->gdev = gdev;
  1338. CARD_RDEV(card) = gdev->cdev[0];
  1339. CARD_WDEV(card) = gdev->cdev[1];
  1340. CARD_DDEV(card) = gdev->cdev[2];
  1341. if (qeth_setup_channel(&card->read, true))
  1342. goto out_ip;
  1343. if (qeth_setup_channel(&card->write, true))
  1344. goto out_channel;
  1345. if (qeth_setup_channel(&card->data, false))
  1346. goto out_data;
  1347. card->options.layer2 = -1;
  1348. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1349. register_service_level(&card->qeth_service_level);
  1350. return card;
  1351. out_data:
  1352. qeth_clean_channel(&card->write);
  1353. out_channel:
  1354. qeth_clean_channel(&card->read);
  1355. out_ip:
  1356. kfree(card);
  1357. out:
  1358. return NULL;
  1359. }
  1360. static int qeth_clear_channel(struct qeth_channel *channel)
  1361. {
  1362. unsigned long flags;
  1363. struct qeth_card *card;
  1364. int rc;
  1365. card = CARD_FROM_CDEV(channel->ccwdev);
  1366. QETH_CARD_TEXT(card, 3, "clearch");
  1367. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1368. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1369. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1370. if (rc)
  1371. return rc;
  1372. rc = wait_event_interruptible_timeout(card->wait_q,
  1373. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1374. if (rc == -ERESTARTSYS)
  1375. return rc;
  1376. if (channel->state != CH_STATE_STOPPED)
  1377. return -ETIME;
  1378. channel->state = CH_STATE_DOWN;
  1379. return 0;
  1380. }
  1381. static int qeth_halt_channel(struct qeth_channel *channel)
  1382. {
  1383. unsigned long flags;
  1384. struct qeth_card *card;
  1385. int rc;
  1386. card = CARD_FROM_CDEV(channel->ccwdev);
  1387. QETH_CARD_TEXT(card, 3, "haltch");
  1388. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1389. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1390. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1391. if (rc)
  1392. return rc;
  1393. rc = wait_event_interruptible_timeout(card->wait_q,
  1394. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1395. if (rc == -ERESTARTSYS)
  1396. return rc;
  1397. if (channel->state != CH_STATE_HALTED)
  1398. return -ETIME;
  1399. return 0;
  1400. }
  1401. static int qeth_halt_channels(struct qeth_card *card)
  1402. {
  1403. int rc1 = 0, rc2 = 0, rc3 = 0;
  1404. QETH_CARD_TEXT(card, 3, "haltchs");
  1405. rc1 = qeth_halt_channel(&card->read);
  1406. rc2 = qeth_halt_channel(&card->write);
  1407. rc3 = qeth_halt_channel(&card->data);
  1408. if (rc1)
  1409. return rc1;
  1410. if (rc2)
  1411. return rc2;
  1412. return rc3;
  1413. }
  1414. static int qeth_clear_channels(struct qeth_card *card)
  1415. {
  1416. int rc1 = 0, rc2 = 0, rc3 = 0;
  1417. QETH_CARD_TEXT(card, 3, "clearchs");
  1418. rc1 = qeth_clear_channel(&card->read);
  1419. rc2 = qeth_clear_channel(&card->write);
  1420. rc3 = qeth_clear_channel(&card->data);
  1421. if (rc1)
  1422. return rc1;
  1423. if (rc2)
  1424. return rc2;
  1425. return rc3;
  1426. }
  1427. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1428. {
  1429. int rc = 0;
  1430. QETH_CARD_TEXT(card, 3, "clhacrd");
  1431. if (halt)
  1432. rc = qeth_halt_channels(card);
  1433. if (rc)
  1434. return rc;
  1435. return qeth_clear_channels(card);
  1436. }
  1437. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1438. {
  1439. int rc = 0;
  1440. QETH_CARD_TEXT(card, 3, "qdioclr");
  1441. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1442. QETH_QDIO_CLEANING)) {
  1443. case QETH_QDIO_ESTABLISHED:
  1444. if (card->info.type == QETH_CARD_TYPE_IQD)
  1445. rc = qdio_shutdown(CARD_DDEV(card),
  1446. QDIO_FLAG_CLEANUP_USING_HALT);
  1447. else
  1448. rc = qdio_shutdown(CARD_DDEV(card),
  1449. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1450. if (rc)
  1451. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1452. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1453. break;
  1454. case QETH_QDIO_CLEANING:
  1455. return rc;
  1456. default:
  1457. break;
  1458. }
  1459. rc = qeth_clear_halt_card(card, use_halt);
  1460. if (rc)
  1461. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1462. card->state = CARD_STATE_DOWN;
  1463. return rc;
  1464. }
  1465. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1466. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1467. int *length)
  1468. {
  1469. struct ciw *ciw;
  1470. char *rcd_buf;
  1471. int ret;
  1472. struct qeth_channel *channel = &card->data;
  1473. unsigned long flags;
  1474. /*
  1475. * scan for RCD command in extended SenseID data
  1476. */
  1477. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1478. if (!ciw || ciw->cmd == 0)
  1479. return -EOPNOTSUPP;
  1480. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1481. if (!rcd_buf)
  1482. return -ENOMEM;
  1483. qeth_setup_ccw(channel->ccw, ciw->cmd, ciw->count, rcd_buf);
  1484. channel->state = CH_STATE_RCD;
  1485. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1486. ret = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1487. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1488. QETH_RCD_TIMEOUT);
  1489. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1490. if (!ret)
  1491. wait_event(card->wait_q,
  1492. (channel->state == CH_STATE_RCD_DONE ||
  1493. channel->state == CH_STATE_DOWN));
  1494. if (channel->state == CH_STATE_DOWN)
  1495. ret = -EIO;
  1496. else
  1497. channel->state = CH_STATE_DOWN;
  1498. if (ret) {
  1499. kfree(rcd_buf);
  1500. *buffer = NULL;
  1501. *length = 0;
  1502. } else {
  1503. *length = ciw->count;
  1504. *buffer = rcd_buf;
  1505. }
  1506. return ret;
  1507. }
  1508. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1509. {
  1510. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1511. card->info.chpid = prcd[30];
  1512. card->info.unit_addr2 = prcd[31];
  1513. card->info.cula = prcd[63];
  1514. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1515. (prcd[0x11] == _ascebc['M']));
  1516. }
  1517. static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
  1518. {
  1519. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1520. struct diag26c_vnic_resp *response = NULL;
  1521. struct diag26c_vnic_req *request = NULL;
  1522. struct ccw_dev_id id;
  1523. char userid[80];
  1524. int rc = 0;
  1525. QETH_DBF_TEXT(SETUP, 2, "vmlayer");
  1526. cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
  1527. if (rc)
  1528. goto out;
  1529. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  1530. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  1531. if (!request || !response) {
  1532. rc = -ENOMEM;
  1533. goto out;
  1534. }
  1535. ccw_device_get_id(CARD_RDEV(card), &id);
  1536. request->resp_buf_len = sizeof(*response);
  1537. request->resp_version = DIAG26C_VERSION6_VM65918;
  1538. request->req_format = DIAG26C_VNIC_INFO;
  1539. ASCEBC(userid, 8);
  1540. memcpy(&request->sys_name, userid, 8);
  1541. request->devno = id.devno;
  1542. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1543. rc = diag26c(request, response, DIAG26C_PORT_VNIC);
  1544. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1545. if (rc)
  1546. goto out;
  1547. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  1548. if (request->resp_buf_len < sizeof(*response) ||
  1549. response->version != request->resp_version) {
  1550. rc = -EIO;
  1551. goto out;
  1552. }
  1553. if (response->protocol == VNIC_INFO_PROT_L2)
  1554. disc = QETH_DISCIPLINE_LAYER2;
  1555. else if (response->protocol == VNIC_INFO_PROT_L3)
  1556. disc = QETH_DISCIPLINE_LAYER3;
  1557. out:
  1558. kfree(response);
  1559. kfree(request);
  1560. if (rc)
  1561. QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
  1562. return disc;
  1563. }
  1564. /* Determine whether the device requires a specific layer discipline */
  1565. static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
  1566. {
  1567. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1568. if (card->info.type == QETH_CARD_TYPE_OSM ||
  1569. card->info.type == QETH_CARD_TYPE_OSN)
  1570. disc = QETH_DISCIPLINE_LAYER2;
  1571. else if (card->info.guestlan)
  1572. disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
  1573. QETH_DISCIPLINE_LAYER3 :
  1574. qeth_vm_detect_layer(card);
  1575. switch (disc) {
  1576. case QETH_DISCIPLINE_LAYER2:
  1577. QETH_DBF_TEXT(SETUP, 3, "force l2");
  1578. break;
  1579. case QETH_DISCIPLINE_LAYER3:
  1580. QETH_DBF_TEXT(SETUP, 3, "force l3");
  1581. break;
  1582. default:
  1583. QETH_DBF_TEXT(SETUP, 3, "force no");
  1584. }
  1585. return disc;
  1586. }
  1587. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1588. {
  1589. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1590. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1591. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1592. card->info.blkt.time_total = 0;
  1593. card->info.blkt.inter_packet = 0;
  1594. card->info.blkt.inter_packet_jumbo = 0;
  1595. } else {
  1596. card->info.blkt.time_total = 250;
  1597. card->info.blkt.inter_packet = 5;
  1598. card->info.blkt.inter_packet_jumbo = 15;
  1599. }
  1600. }
  1601. static void qeth_init_tokens(struct qeth_card *card)
  1602. {
  1603. card->token.issuer_rm_w = 0x00010103UL;
  1604. card->token.cm_filter_w = 0x00010108UL;
  1605. card->token.cm_connection_w = 0x0001010aUL;
  1606. card->token.ulp_filter_w = 0x0001010bUL;
  1607. card->token.ulp_connection_w = 0x0001010dUL;
  1608. }
  1609. static void qeth_init_func_level(struct qeth_card *card)
  1610. {
  1611. switch (card->info.type) {
  1612. case QETH_CARD_TYPE_IQD:
  1613. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1614. break;
  1615. case QETH_CARD_TYPE_OSD:
  1616. case QETH_CARD_TYPE_OSN:
  1617. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1618. break;
  1619. default:
  1620. break;
  1621. }
  1622. }
  1623. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1624. void (*idx_reply_cb)(struct qeth_channel *,
  1625. struct qeth_cmd_buffer *))
  1626. {
  1627. struct qeth_cmd_buffer *iob;
  1628. unsigned long flags;
  1629. int rc;
  1630. struct qeth_card *card;
  1631. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1632. card = CARD_FROM_CDEV(channel->ccwdev);
  1633. iob = qeth_get_buffer(channel);
  1634. if (!iob)
  1635. return -ENOMEM;
  1636. iob->callback = idx_reply_cb;
  1637. qeth_setup_ccw(channel->ccw, CCW_CMD_READ, QETH_BUFSIZE, iob->data);
  1638. wait_event(card->wait_q,
  1639. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1640. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1641. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1642. rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1643. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1644. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1645. if (rc) {
  1646. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1647. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1648. atomic_set(&channel->irq_pending, 0);
  1649. qeth_release_buffer(channel, iob);
  1650. wake_up(&card->wait_q);
  1651. return rc;
  1652. }
  1653. rc = wait_event_interruptible_timeout(card->wait_q,
  1654. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1655. if (rc == -ERESTARTSYS)
  1656. return rc;
  1657. if (channel->state != CH_STATE_UP) {
  1658. rc = -ETIME;
  1659. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1660. } else
  1661. rc = 0;
  1662. return rc;
  1663. }
  1664. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1665. void (*idx_reply_cb)(struct qeth_channel *,
  1666. struct qeth_cmd_buffer *))
  1667. {
  1668. struct qeth_card *card;
  1669. struct qeth_cmd_buffer *iob;
  1670. unsigned long flags;
  1671. __u16 temp;
  1672. __u8 tmp;
  1673. int rc;
  1674. struct ccw_dev_id temp_devid;
  1675. card = CARD_FROM_CDEV(channel->ccwdev);
  1676. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1677. iob = qeth_get_buffer(channel);
  1678. if (!iob)
  1679. return -ENOMEM;
  1680. iob->callback = idx_reply_cb;
  1681. qeth_setup_ccw(channel->ccw, CCW_CMD_WRITE, IDX_ACTIVATE_SIZE,
  1682. iob->data);
  1683. if (channel == &card->write) {
  1684. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1685. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1686. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1687. card->seqno.trans_hdr++;
  1688. } else {
  1689. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1690. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1691. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1692. }
  1693. tmp = ((u8)card->dev->dev_port) | 0x80;
  1694. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1695. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1696. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1697. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1698. &card->info.func_level, sizeof(__u16));
  1699. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1700. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1701. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1702. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1703. wait_event(card->wait_q,
  1704. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1705. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1706. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1707. rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1708. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1709. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1710. if (rc) {
  1711. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1712. rc);
  1713. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1714. atomic_set(&channel->irq_pending, 0);
  1715. qeth_release_buffer(channel, iob);
  1716. wake_up(&card->wait_q);
  1717. return rc;
  1718. }
  1719. rc = wait_event_interruptible_timeout(card->wait_q,
  1720. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1721. if (rc == -ERESTARTSYS)
  1722. return rc;
  1723. if (channel->state != CH_STATE_ACTIVATING) {
  1724. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1725. " failed to recover an error on the device\n");
  1726. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1727. dev_name(&channel->ccwdev->dev));
  1728. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1729. return -ETIME;
  1730. }
  1731. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1732. }
  1733. static int qeth_peer_func_level(int level)
  1734. {
  1735. if ((level & 0xff) == 8)
  1736. return (level & 0xff) + 0x400;
  1737. if (((level >> 8) & 3) == 1)
  1738. return (level & 0xff) + 0x200;
  1739. return level;
  1740. }
  1741. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1742. struct qeth_cmd_buffer *iob)
  1743. {
  1744. struct qeth_card *card;
  1745. __u16 temp;
  1746. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1747. if (channel->state == CH_STATE_DOWN) {
  1748. channel->state = CH_STATE_ACTIVATING;
  1749. goto out;
  1750. }
  1751. card = CARD_FROM_CDEV(channel->ccwdev);
  1752. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1753. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1754. dev_err(&channel->ccwdev->dev,
  1755. "The adapter is used exclusively by another "
  1756. "host\n");
  1757. else
  1758. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1759. " negative reply\n",
  1760. dev_name(&channel->ccwdev->dev));
  1761. goto out;
  1762. }
  1763. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1764. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1765. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1766. "function level mismatch (sent: 0x%x, received: "
  1767. "0x%x)\n", dev_name(&channel->ccwdev->dev),
  1768. card->info.func_level, temp);
  1769. goto out;
  1770. }
  1771. channel->state = CH_STATE_UP;
  1772. out:
  1773. qeth_release_buffer(channel, iob);
  1774. }
  1775. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1776. struct qeth_cmd_buffer *iob)
  1777. {
  1778. struct qeth_card *card;
  1779. __u16 temp;
  1780. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1781. if (channel->state == CH_STATE_DOWN) {
  1782. channel->state = CH_STATE_ACTIVATING;
  1783. goto out;
  1784. }
  1785. card = CARD_FROM_CDEV(channel->ccwdev);
  1786. if (qeth_check_idx_response(card, iob->data))
  1787. goto out;
  1788. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1789. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1790. case QETH_IDX_ACT_ERR_EXCL:
  1791. dev_err(&channel->ccwdev->dev,
  1792. "The adapter is used exclusively by another "
  1793. "host\n");
  1794. break;
  1795. case QETH_IDX_ACT_ERR_AUTH:
  1796. case QETH_IDX_ACT_ERR_AUTH_USER:
  1797. dev_err(&channel->ccwdev->dev,
  1798. "Setting the device online failed because of "
  1799. "insufficient authorization\n");
  1800. break;
  1801. default:
  1802. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1803. " negative reply\n",
  1804. dev_name(&channel->ccwdev->dev));
  1805. }
  1806. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1807. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1808. goto out;
  1809. }
  1810. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1811. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1812. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1813. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1814. dev_name(&channel->ccwdev->dev),
  1815. card->info.func_level, temp);
  1816. goto out;
  1817. }
  1818. memcpy(&card->token.issuer_rm_r,
  1819. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1820. QETH_MPC_TOKEN_LENGTH);
  1821. memcpy(&card->info.mcl_level[0],
  1822. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1823. channel->state = CH_STATE_UP;
  1824. out:
  1825. qeth_release_buffer(channel, iob);
  1826. }
  1827. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1828. struct qeth_cmd_buffer *iob)
  1829. {
  1830. qeth_setup_ccw(iob->channel->ccw, CCW_CMD_WRITE, len, iob->data);
  1831. iob->callback = qeth_release_buffer;
  1832. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1833. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1834. card->seqno.trans_hdr++;
  1835. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1836. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1837. card->seqno.pdu_hdr++;
  1838. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1839. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1840. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1841. }
  1842. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1843. /**
  1844. * qeth_send_control_data() - send control command to the card
  1845. * @card: qeth_card structure pointer
  1846. * @len: size of the command buffer
  1847. * @iob: qeth_cmd_buffer pointer
  1848. * @reply_cb: callback function pointer
  1849. * @cb_card: pointer to the qeth_card structure
  1850. * @cb_reply: pointer to the qeth_reply structure
  1851. * @cb_cmd: pointer to the original iob for non-IPA
  1852. * commands, or to the qeth_ipa_cmd structure
  1853. * for the IPA commands.
  1854. * @reply_param: private pointer passed to the callback
  1855. *
  1856. * Returns the value of the `return_code' field of the response
  1857. * block returned from the hardware, or other error indication.
  1858. * Value of zero indicates successful execution of the command.
  1859. *
  1860. * Callback function gets called one or more times, with cb_cmd
  1861. * pointing to the response returned by the hardware. Callback
  1862. * function must return non-zero if more reply blocks are expected,
  1863. * and zero if the last or only reply block is received. Callback
  1864. * function can get the value of the reply_param pointer from the
  1865. * field 'param' of the structure qeth_reply.
  1866. */
  1867. int qeth_send_control_data(struct qeth_card *card, int len,
  1868. struct qeth_cmd_buffer *iob,
  1869. int (*reply_cb)(struct qeth_card *cb_card,
  1870. struct qeth_reply *cb_reply,
  1871. unsigned long cb_cmd),
  1872. void *reply_param)
  1873. {
  1874. struct qeth_channel *channel = iob->channel;
  1875. int rc;
  1876. unsigned long flags;
  1877. struct qeth_reply *reply = NULL;
  1878. unsigned long timeout, event_timeout;
  1879. struct qeth_ipa_cmd *cmd = NULL;
  1880. QETH_CARD_TEXT(card, 2, "sendctl");
  1881. if (card->read_or_write_problem) {
  1882. qeth_release_buffer(channel, iob);
  1883. return -EIO;
  1884. }
  1885. reply = qeth_alloc_reply(card);
  1886. if (!reply) {
  1887. qeth_release_buffer(channel, iob);
  1888. return -ENOMEM;
  1889. }
  1890. reply->callback = reply_cb;
  1891. reply->param = reply_param;
  1892. init_waitqueue_head(&reply->wait_q);
  1893. while (atomic_cmpxchg(&channel->irq_pending, 0, 1)) ;
  1894. if (IS_IPA(iob->data)) {
  1895. cmd = __ipa_cmd(iob);
  1896. cmd->hdr.seqno = card->seqno.ipa++;
  1897. reply->seqno = cmd->hdr.seqno;
  1898. event_timeout = QETH_IPA_TIMEOUT;
  1899. } else {
  1900. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1901. event_timeout = QETH_TIMEOUT;
  1902. }
  1903. qeth_prepare_control_data(card, len, iob);
  1904. spin_lock_irqsave(&card->lock, flags);
  1905. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1906. spin_unlock_irqrestore(&card->lock, flags);
  1907. timeout = jiffies + event_timeout;
  1908. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1909. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1910. rc = ccw_device_start_timeout(channel->ccwdev, channel->ccw,
  1911. (addr_t) iob, 0, 0, event_timeout);
  1912. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1913. if (rc) {
  1914. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1915. "ccw_device_start rc = %i\n",
  1916. dev_name(&channel->ccwdev->dev), rc);
  1917. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1918. spin_lock_irqsave(&card->lock, flags);
  1919. list_del_init(&reply->list);
  1920. qeth_put_reply(reply);
  1921. spin_unlock_irqrestore(&card->lock, flags);
  1922. qeth_release_buffer(channel, iob);
  1923. atomic_set(&channel->irq_pending, 0);
  1924. wake_up(&card->wait_q);
  1925. return rc;
  1926. }
  1927. /* we have only one long running ipassist, since we can ensure
  1928. process context of this command we can sleep */
  1929. if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
  1930. cmd->hdr.prot_version == QETH_PROT_IPV4) {
  1931. if (!wait_event_timeout(reply->wait_q,
  1932. atomic_read(&reply->received), event_timeout))
  1933. goto time_err;
  1934. } else {
  1935. while (!atomic_read(&reply->received)) {
  1936. if (time_after(jiffies, timeout))
  1937. goto time_err;
  1938. cpu_relax();
  1939. }
  1940. }
  1941. rc = reply->rc;
  1942. qeth_put_reply(reply);
  1943. return rc;
  1944. time_err:
  1945. reply->rc = -ETIME;
  1946. spin_lock_irqsave(&reply->card->lock, flags);
  1947. list_del_init(&reply->list);
  1948. spin_unlock_irqrestore(&reply->card->lock, flags);
  1949. atomic_inc(&reply->received);
  1950. rc = reply->rc;
  1951. qeth_put_reply(reply);
  1952. return rc;
  1953. }
  1954. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1955. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1956. unsigned long data)
  1957. {
  1958. struct qeth_cmd_buffer *iob;
  1959. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1960. iob = (struct qeth_cmd_buffer *) data;
  1961. memcpy(&card->token.cm_filter_r,
  1962. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1963. QETH_MPC_TOKEN_LENGTH);
  1964. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1965. return 0;
  1966. }
  1967. static int qeth_cm_enable(struct qeth_card *card)
  1968. {
  1969. int rc;
  1970. struct qeth_cmd_buffer *iob;
  1971. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1972. iob = qeth_wait_for_buffer(&card->write);
  1973. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1974. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1975. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1976. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1977. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1978. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1979. qeth_cm_enable_cb, NULL);
  1980. return rc;
  1981. }
  1982. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1983. unsigned long data)
  1984. {
  1985. struct qeth_cmd_buffer *iob;
  1986. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1987. iob = (struct qeth_cmd_buffer *) data;
  1988. memcpy(&card->token.cm_connection_r,
  1989. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1990. QETH_MPC_TOKEN_LENGTH);
  1991. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1992. return 0;
  1993. }
  1994. static int qeth_cm_setup(struct qeth_card *card)
  1995. {
  1996. int rc;
  1997. struct qeth_cmd_buffer *iob;
  1998. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1999. iob = qeth_wait_for_buffer(&card->write);
  2000. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  2001. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  2002. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  2003. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  2004. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  2005. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  2006. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  2007. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  2008. qeth_cm_setup_cb, NULL);
  2009. return rc;
  2010. }
  2011. static int qeth_update_max_mtu(struct qeth_card *card, unsigned int max_mtu)
  2012. {
  2013. struct net_device *dev = card->dev;
  2014. unsigned int new_mtu;
  2015. if (!max_mtu) {
  2016. /* IQD needs accurate max MTU to set up its RX buffers: */
  2017. if (IS_IQD(card))
  2018. return -EINVAL;
  2019. /* tolerate quirky HW: */
  2020. max_mtu = ETH_MAX_MTU;
  2021. }
  2022. rtnl_lock();
  2023. if (IS_IQD(card)) {
  2024. /* move any device with default MTU to new max MTU: */
  2025. new_mtu = (dev->mtu == dev->max_mtu) ? max_mtu : dev->mtu;
  2026. /* adjust RX buffer size to new max MTU: */
  2027. card->qdio.in_buf_size = max_mtu + 2 * PAGE_SIZE;
  2028. if (dev->max_mtu && dev->max_mtu != max_mtu)
  2029. qeth_free_qdio_buffers(card);
  2030. } else {
  2031. if (dev->mtu)
  2032. new_mtu = dev->mtu;
  2033. /* default MTUs for first setup: */
  2034. else if (card->options.layer2)
  2035. new_mtu = ETH_DATA_LEN;
  2036. else
  2037. new_mtu = ETH_DATA_LEN - 8; /* allow for LLC + SNAP */
  2038. }
  2039. dev->max_mtu = max_mtu;
  2040. dev->mtu = min(new_mtu, max_mtu);
  2041. rtnl_unlock();
  2042. return 0;
  2043. }
  2044. static int qeth_get_mtu_outof_framesize(int framesize)
  2045. {
  2046. switch (framesize) {
  2047. case 0x4000:
  2048. return 8192;
  2049. case 0x6000:
  2050. return 16384;
  2051. case 0xa000:
  2052. return 32768;
  2053. case 0xffff:
  2054. return 57344;
  2055. default:
  2056. return 0;
  2057. }
  2058. }
  2059. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2060. unsigned long data)
  2061. {
  2062. __u16 mtu, framesize;
  2063. __u16 len;
  2064. __u8 link_type;
  2065. struct qeth_cmd_buffer *iob;
  2066. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2067. iob = (struct qeth_cmd_buffer *) data;
  2068. memcpy(&card->token.ulp_filter_r,
  2069. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2070. QETH_MPC_TOKEN_LENGTH);
  2071. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2072. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2073. mtu = qeth_get_mtu_outof_framesize(framesize);
  2074. } else {
  2075. mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data);
  2076. }
  2077. *(u16 *)reply->param = mtu;
  2078. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2079. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2080. memcpy(&link_type,
  2081. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2082. card->info.link_type = link_type;
  2083. } else
  2084. card->info.link_type = 0;
  2085. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2086. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2087. return 0;
  2088. }
  2089. static u8 qeth_mpc_select_prot_type(struct qeth_card *card)
  2090. {
  2091. if (IS_OSN(card))
  2092. return QETH_PROT_OSN2;
  2093. return (card->options.layer2 == 1) ? QETH_PROT_LAYER2 : QETH_PROT_TCPIP;
  2094. }
  2095. static int qeth_ulp_enable(struct qeth_card *card)
  2096. {
  2097. u8 prot_type = qeth_mpc_select_prot_type(card);
  2098. struct qeth_cmd_buffer *iob;
  2099. u16 max_mtu;
  2100. int rc;
  2101. /*FIXME: trace view callbacks*/
  2102. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2103. iob = qeth_wait_for_buffer(&card->write);
  2104. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2105. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = (u8) card->dev->dev_port;
  2106. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2107. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2108. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2109. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2110. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2111. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2112. qeth_ulp_enable_cb, &max_mtu);
  2113. if (rc)
  2114. return rc;
  2115. return qeth_update_max_mtu(card, max_mtu);
  2116. }
  2117. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2118. unsigned long data)
  2119. {
  2120. struct qeth_cmd_buffer *iob;
  2121. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2122. iob = (struct qeth_cmd_buffer *) data;
  2123. memcpy(&card->token.ulp_connection_r,
  2124. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2125. QETH_MPC_TOKEN_LENGTH);
  2126. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2127. 3)) {
  2128. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2129. dev_err(&card->gdev->dev, "A connection could not be "
  2130. "established because of an OLM limit\n");
  2131. iob->rc = -EMLINK;
  2132. }
  2133. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2134. return 0;
  2135. }
  2136. static int qeth_ulp_setup(struct qeth_card *card)
  2137. {
  2138. int rc;
  2139. __u16 temp;
  2140. struct qeth_cmd_buffer *iob;
  2141. struct ccw_dev_id dev_id;
  2142. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2143. iob = qeth_wait_for_buffer(&card->write);
  2144. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2145. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2146. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2147. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2148. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2149. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2150. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2151. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2152. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2153. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2154. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2155. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2156. qeth_ulp_setup_cb, NULL);
  2157. return rc;
  2158. }
  2159. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2160. {
  2161. struct qeth_qdio_out_buffer *newbuf;
  2162. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2163. if (!newbuf)
  2164. return -ENOMEM;
  2165. newbuf->buffer = q->qdio_bufs[bidx];
  2166. skb_queue_head_init(&newbuf->skb_list);
  2167. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2168. newbuf->q = q;
  2169. newbuf->next_pending = q->bufs[bidx];
  2170. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2171. q->bufs[bidx] = newbuf;
  2172. return 0;
  2173. }
  2174. static void qeth_free_output_queue(struct qeth_qdio_out_q *q)
  2175. {
  2176. if (!q)
  2177. return;
  2178. qeth_clear_outq_buffers(q, 1);
  2179. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2180. kfree(q);
  2181. }
  2182. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2183. {
  2184. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2185. if (!q)
  2186. return NULL;
  2187. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2188. kfree(q);
  2189. return NULL;
  2190. }
  2191. return q;
  2192. }
  2193. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2194. {
  2195. int i, j;
  2196. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2197. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2198. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2199. return 0;
  2200. QETH_DBF_TEXT(SETUP, 2, "inq");
  2201. card->qdio.in_q = qeth_alloc_qdio_queue();
  2202. if (!card->qdio.in_q)
  2203. goto out_nomem;
  2204. /* inbound buffer pool */
  2205. if (qeth_alloc_buffer_pool(card))
  2206. goto out_freeinq;
  2207. /* outbound */
  2208. card->qdio.out_qs =
  2209. kcalloc(card->qdio.no_out_queues,
  2210. sizeof(struct qeth_qdio_out_q *),
  2211. GFP_KERNEL);
  2212. if (!card->qdio.out_qs)
  2213. goto out_freepool;
  2214. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2215. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2216. if (!card->qdio.out_qs[i])
  2217. goto out_freeoutq;
  2218. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2219. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2220. card->qdio.out_qs[i]->queue_no = i;
  2221. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2222. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2223. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2224. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2225. goto out_freeoutqbufs;
  2226. }
  2227. }
  2228. /* completion */
  2229. if (qeth_alloc_cq(card))
  2230. goto out_freeoutq;
  2231. return 0;
  2232. out_freeoutqbufs:
  2233. while (j > 0) {
  2234. --j;
  2235. kmem_cache_free(qeth_qdio_outbuf_cache,
  2236. card->qdio.out_qs[i]->bufs[j]);
  2237. card->qdio.out_qs[i]->bufs[j] = NULL;
  2238. }
  2239. out_freeoutq:
  2240. while (i > 0)
  2241. qeth_free_output_queue(card->qdio.out_qs[--i]);
  2242. kfree(card->qdio.out_qs);
  2243. card->qdio.out_qs = NULL;
  2244. out_freepool:
  2245. qeth_free_buffer_pool(card);
  2246. out_freeinq:
  2247. qeth_free_qdio_queue(card->qdio.in_q);
  2248. card->qdio.in_q = NULL;
  2249. out_nomem:
  2250. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2251. return -ENOMEM;
  2252. }
  2253. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2254. {
  2255. int i, j;
  2256. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2257. QETH_QDIO_UNINITIALIZED)
  2258. return;
  2259. qeth_free_cq(card);
  2260. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2261. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2262. if (card->qdio.in_q->bufs[j].rx_skb)
  2263. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2264. }
  2265. qeth_free_qdio_queue(card->qdio.in_q);
  2266. card->qdio.in_q = NULL;
  2267. /* inbound buffer pool */
  2268. qeth_free_buffer_pool(card);
  2269. /* free outbound qdio_qs */
  2270. if (card->qdio.out_qs) {
  2271. for (i = 0; i < card->qdio.no_out_queues; i++)
  2272. qeth_free_output_queue(card->qdio.out_qs[i]);
  2273. kfree(card->qdio.out_qs);
  2274. card->qdio.out_qs = NULL;
  2275. }
  2276. }
  2277. static void qeth_create_qib_param_field(struct qeth_card *card,
  2278. char *param_field)
  2279. {
  2280. param_field[0] = _ascebc['P'];
  2281. param_field[1] = _ascebc['C'];
  2282. param_field[2] = _ascebc['I'];
  2283. param_field[3] = _ascebc['T'];
  2284. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2285. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2286. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2287. }
  2288. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2289. char *param_field)
  2290. {
  2291. param_field[16] = _ascebc['B'];
  2292. param_field[17] = _ascebc['L'];
  2293. param_field[18] = _ascebc['K'];
  2294. param_field[19] = _ascebc['T'];
  2295. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2296. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2297. *((unsigned int *) (&param_field[28])) =
  2298. card->info.blkt.inter_packet_jumbo;
  2299. }
  2300. static int qeth_qdio_activate(struct qeth_card *card)
  2301. {
  2302. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2303. return qdio_activate(CARD_DDEV(card));
  2304. }
  2305. static int qeth_dm_act(struct qeth_card *card)
  2306. {
  2307. int rc;
  2308. struct qeth_cmd_buffer *iob;
  2309. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2310. iob = qeth_wait_for_buffer(&card->write);
  2311. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2312. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2313. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2314. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2315. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2316. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2317. return rc;
  2318. }
  2319. static int qeth_mpc_initialize(struct qeth_card *card)
  2320. {
  2321. int rc;
  2322. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2323. rc = qeth_issue_next_read(card);
  2324. if (rc) {
  2325. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2326. return rc;
  2327. }
  2328. rc = qeth_cm_enable(card);
  2329. if (rc) {
  2330. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2331. goto out_qdio;
  2332. }
  2333. rc = qeth_cm_setup(card);
  2334. if (rc) {
  2335. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2336. goto out_qdio;
  2337. }
  2338. rc = qeth_ulp_enable(card);
  2339. if (rc) {
  2340. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2341. goto out_qdio;
  2342. }
  2343. rc = qeth_ulp_setup(card);
  2344. if (rc) {
  2345. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2346. goto out_qdio;
  2347. }
  2348. rc = qeth_alloc_qdio_buffers(card);
  2349. if (rc) {
  2350. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2351. goto out_qdio;
  2352. }
  2353. rc = qeth_qdio_establish(card);
  2354. if (rc) {
  2355. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2356. qeth_free_qdio_buffers(card);
  2357. goto out_qdio;
  2358. }
  2359. rc = qeth_qdio_activate(card);
  2360. if (rc) {
  2361. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2362. goto out_qdio;
  2363. }
  2364. rc = qeth_dm_act(card);
  2365. if (rc) {
  2366. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2367. goto out_qdio;
  2368. }
  2369. return 0;
  2370. out_qdio:
  2371. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2372. qdio_free(CARD_DDEV(card));
  2373. return rc;
  2374. }
  2375. void qeth_print_status_message(struct qeth_card *card)
  2376. {
  2377. switch (card->info.type) {
  2378. case QETH_CARD_TYPE_OSD:
  2379. case QETH_CARD_TYPE_OSM:
  2380. case QETH_CARD_TYPE_OSX:
  2381. /* VM will use a non-zero first character
  2382. * to indicate a HiperSockets like reporting
  2383. * of the level OSA sets the first character to zero
  2384. * */
  2385. if (!card->info.mcl_level[0]) {
  2386. sprintf(card->info.mcl_level, "%02x%02x",
  2387. card->info.mcl_level[2],
  2388. card->info.mcl_level[3]);
  2389. break;
  2390. }
  2391. /* fallthrough */
  2392. case QETH_CARD_TYPE_IQD:
  2393. if ((card->info.guestlan) ||
  2394. (card->info.mcl_level[0] & 0x80)) {
  2395. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2396. card->info.mcl_level[0]];
  2397. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2398. card->info.mcl_level[1]];
  2399. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2400. card->info.mcl_level[2]];
  2401. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2402. card->info.mcl_level[3]];
  2403. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2404. }
  2405. break;
  2406. default:
  2407. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2408. }
  2409. dev_info(&card->gdev->dev,
  2410. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2411. qeth_get_cardname(card),
  2412. (card->info.mcl_level[0]) ? " (level: " : "",
  2413. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2414. (card->info.mcl_level[0]) ? ")" : "",
  2415. qeth_get_cardname_short(card));
  2416. }
  2417. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2418. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2419. {
  2420. struct qeth_buffer_pool_entry *entry;
  2421. QETH_CARD_TEXT(card, 5, "inwrklst");
  2422. list_for_each_entry(entry,
  2423. &card->qdio.init_pool.entry_list, init_list) {
  2424. qeth_put_buffer_pool_entry(card, entry);
  2425. }
  2426. }
  2427. static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2428. struct qeth_card *card)
  2429. {
  2430. struct list_head *plh;
  2431. struct qeth_buffer_pool_entry *entry;
  2432. int i, free;
  2433. struct page *page;
  2434. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2435. return NULL;
  2436. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2437. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2438. free = 1;
  2439. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2440. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2441. free = 0;
  2442. break;
  2443. }
  2444. }
  2445. if (free) {
  2446. list_del_init(&entry->list);
  2447. return entry;
  2448. }
  2449. }
  2450. /* no free buffer in pool so take first one and swap pages */
  2451. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2452. struct qeth_buffer_pool_entry, list);
  2453. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2454. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2455. page = alloc_page(GFP_ATOMIC);
  2456. if (!page) {
  2457. return NULL;
  2458. } else {
  2459. free_page((unsigned long)entry->elements[i]);
  2460. entry->elements[i] = page_address(page);
  2461. if (card->options.performance_stats)
  2462. card->perf_stats.sg_alloc_page_rx++;
  2463. }
  2464. }
  2465. }
  2466. list_del_init(&entry->list);
  2467. return entry;
  2468. }
  2469. static int qeth_init_input_buffer(struct qeth_card *card,
  2470. struct qeth_qdio_buffer *buf)
  2471. {
  2472. struct qeth_buffer_pool_entry *pool_entry;
  2473. int i;
  2474. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2475. buf->rx_skb = netdev_alloc_skb(card->dev,
  2476. QETH_RX_PULL_LEN + ETH_HLEN);
  2477. if (!buf->rx_skb)
  2478. return -ENOMEM;
  2479. }
  2480. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2481. if (!pool_entry)
  2482. return -ENOBUFS;
  2483. /*
  2484. * since the buffer is accessed only from the input_tasklet
  2485. * there shouldn't be a need to synchronize; also, since we use
  2486. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2487. * buffers
  2488. */
  2489. buf->pool_entry = pool_entry;
  2490. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2491. buf->buffer->element[i].length = PAGE_SIZE;
  2492. buf->buffer->element[i].addr = pool_entry->elements[i];
  2493. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2494. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2495. else
  2496. buf->buffer->element[i].eflags = 0;
  2497. buf->buffer->element[i].sflags = 0;
  2498. }
  2499. return 0;
  2500. }
  2501. int qeth_init_qdio_queues(struct qeth_card *card)
  2502. {
  2503. int i, j;
  2504. int rc;
  2505. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2506. /* inbound queue */
  2507. qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2508. memset(&card->rx, 0, sizeof(struct qeth_rx));
  2509. qeth_initialize_working_pool_list(card);
  2510. /*give only as many buffers to hardware as we have buffer pool entries*/
  2511. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; i++) {
  2512. rc = qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2513. if (rc)
  2514. return rc;
  2515. }
  2516. card->qdio.in_q->next_buf_to_init =
  2517. card->qdio.in_buf_pool.buf_count - 1;
  2518. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2519. card->qdio.in_buf_pool.buf_count - 1);
  2520. if (rc) {
  2521. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2522. return rc;
  2523. }
  2524. /* completion */
  2525. rc = qeth_cq_init(card);
  2526. if (rc) {
  2527. return rc;
  2528. }
  2529. /* outbound queue */
  2530. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2531. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2532. QDIO_MAX_BUFFERS_PER_Q);
  2533. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2534. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2535. card->qdio.out_qs[i]->bufs[j]);
  2536. }
  2537. card->qdio.out_qs[i]->card = card;
  2538. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2539. card->qdio.out_qs[i]->do_pack = 0;
  2540. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2541. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2542. atomic_set(&card->qdio.out_qs[i]->state,
  2543. QETH_OUT_Q_UNLOCKED);
  2544. }
  2545. return 0;
  2546. }
  2547. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2548. static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2549. {
  2550. switch (link_type) {
  2551. case QETH_LINK_TYPE_HSTR:
  2552. return 2;
  2553. default:
  2554. return 1;
  2555. }
  2556. }
  2557. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2558. struct qeth_ipa_cmd *cmd, __u8 command,
  2559. enum qeth_prot_versions prot)
  2560. {
  2561. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2562. cmd->hdr.command = command;
  2563. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2564. /* cmd->hdr.seqno is set by qeth_send_control_data() */
  2565. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2566. cmd->hdr.rel_adapter_no = (u8) card->dev->dev_port;
  2567. if (card->options.layer2)
  2568. cmd->hdr.prim_version_no = 2;
  2569. else
  2570. cmd->hdr.prim_version_no = 1;
  2571. cmd->hdr.param_count = 1;
  2572. cmd->hdr.prot_version = prot;
  2573. cmd->hdr.ipa_supported = 0;
  2574. cmd->hdr.ipa_enabled = 0;
  2575. }
  2576. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2577. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2578. {
  2579. struct qeth_cmd_buffer *iob;
  2580. iob = qeth_get_buffer(&card->write);
  2581. if (iob) {
  2582. qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
  2583. } else {
  2584. dev_warn(&card->gdev->dev,
  2585. "The qeth driver ran out of channel command buffers\n");
  2586. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2587. dev_name(&card->gdev->dev));
  2588. }
  2589. return iob;
  2590. }
  2591. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2592. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob)
  2593. {
  2594. u8 prot_type = qeth_mpc_select_prot_type(card);
  2595. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2596. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2597. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2598. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2599. }
  2600. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2601. /**
  2602. * qeth_send_ipa_cmd() - send an IPA command
  2603. *
  2604. * See qeth_send_control_data() for explanation of the arguments.
  2605. */
  2606. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2607. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2608. unsigned long),
  2609. void *reply_param)
  2610. {
  2611. int rc;
  2612. QETH_CARD_TEXT(card, 4, "sendipa");
  2613. qeth_prepare_ipa_cmd(card, iob);
  2614. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2615. iob, reply_cb, reply_param);
  2616. if (rc == -ETIME) {
  2617. qeth_clear_ipacmd_list(card);
  2618. qeth_schedule_recovery(card);
  2619. }
  2620. return rc;
  2621. }
  2622. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2623. static int qeth_send_startlan(struct qeth_card *card)
  2624. {
  2625. int rc;
  2626. struct qeth_cmd_buffer *iob;
  2627. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2628. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2629. if (!iob)
  2630. return -ENOMEM;
  2631. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2632. return rc;
  2633. }
  2634. static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  2635. {
  2636. if (!cmd->hdr.return_code)
  2637. cmd->hdr.return_code =
  2638. cmd->data.setadapterparms.hdr.return_code;
  2639. return cmd->hdr.return_code;
  2640. }
  2641. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2642. struct qeth_reply *reply, unsigned long data)
  2643. {
  2644. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2645. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2646. if (qeth_setadpparms_inspect_rc(cmd))
  2647. return 0;
  2648. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2649. card->info.link_type =
  2650. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2651. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2652. }
  2653. card->options.adp.supported_funcs =
  2654. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2655. return 0;
  2656. }
  2657. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2658. __u32 command, __u32 cmdlen)
  2659. {
  2660. struct qeth_cmd_buffer *iob;
  2661. struct qeth_ipa_cmd *cmd;
  2662. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2663. QETH_PROT_IPV4);
  2664. if (iob) {
  2665. cmd = __ipa_cmd(iob);
  2666. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2667. cmd->data.setadapterparms.hdr.command_code = command;
  2668. cmd->data.setadapterparms.hdr.used_total = 1;
  2669. cmd->data.setadapterparms.hdr.seq_no = 1;
  2670. }
  2671. return iob;
  2672. }
  2673. static int qeth_query_setadapterparms(struct qeth_card *card)
  2674. {
  2675. int rc;
  2676. struct qeth_cmd_buffer *iob;
  2677. QETH_CARD_TEXT(card, 3, "queryadp");
  2678. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2679. sizeof(struct qeth_ipacmd_setadpparms));
  2680. if (!iob)
  2681. return -ENOMEM;
  2682. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2683. return rc;
  2684. }
  2685. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2686. struct qeth_reply *reply, unsigned long data)
  2687. {
  2688. struct qeth_ipa_cmd *cmd;
  2689. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2690. cmd = (struct qeth_ipa_cmd *) data;
  2691. switch (cmd->hdr.return_code) {
  2692. case IPA_RC_NOTSUPP:
  2693. case IPA_RC_L2_UNSUPPORTED_CMD:
  2694. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2695. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2696. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2697. return -0;
  2698. default:
  2699. if (cmd->hdr.return_code) {
  2700. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2701. "rc=%d\n",
  2702. dev_name(&card->gdev->dev),
  2703. cmd->hdr.return_code);
  2704. return 0;
  2705. }
  2706. }
  2707. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2708. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2709. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2710. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2711. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2712. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2713. } else
  2714. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2715. "\n", dev_name(&card->gdev->dev));
  2716. return 0;
  2717. }
  2718. static int qeth_query_ipassists(struct qeth_card *card,
  2719. enum qeth_prot_versions prot)
  2720. {
  2721. int rc;
  2722. struct qeth_cmd_buffer *iob;
  2723. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2724. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2725. if (!iob)
  2726. return -ENOMEM;
  2727. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2728. return rc;
  2729. }
  2730. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2731. struct qeth_reply *reply, unsigned long data)
  2732. {
  2733. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2734. struct qeth_query_switch_attributes *attrs;
  2735. struct qeth_switch_info *sw_info;
  2736. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2737. if (qeth_setadpparms_inspect_rc(cmd))
  2738. return 0;
  2739. sw_info = (struct qeth_switch_info *)reply->param;
  2740. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2741. sw_info->capabilities = attrs->capabilities;
  2742. sw_info->settings = attrs->settings;
  2743. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2744. sw_info->settings);
  2745. return 0;
  2746. }
  2747. int qeth_query_switch_attributes(struct qeth_card *card,
  2748. struct qeth_switch_info *sw_info)
  2749. {
  2750. struct qeth_cmd_buffer *iob;
  2751. QETH_CARD_TEXT(card, 2, "qswiattr");
  2752. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2753. return -EOPNOTSUPP;
  2754. if (!netif_carrier_ok(card->dev))
  2755. return -ENOMEDIUM;
  2756. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2757. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2758. if (!iob)
  2759. return -ENOMEM;
  2760. return qeth_send_ipa_cmd(card, iob,
  2761. qeth_query_switch_attributes_cb, sw_info);
  2762. }
  2763. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2764. struct qeth_reply *reply, unsigned long data)
  2765. {
  2766. struct qeth_ipa_cmd *cmd;
  2767. __u16 rc;
  2768. cmd = (struct qeth_ipa_cmd *)data;
  2769. rc = cmd->hdr.return_code;
  2770. if (rc)
  2771. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2772. else
  2773. card->info.diagass_support = cmd->data.diagass.ext;
  2774. return 0;
  2775. }
  2776. static int qeth_query_setdiagass(struct qeth_card *card)
  2777. {
  2778. struct qeth_cmd_buffer *iob;
  2779. struct qeth_ipa_cmd *cmd;
  2780. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2781. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2782. if (!iob)
  2783. return -ENOMEM;
  2784. cmd = __ipa_cmd(iob);
  2785. cmd->data.diagass.subcmd_len = 16;
  2786. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2787. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2788. }
  2789. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2790. {
  2791. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2792. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2793. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2794. struct ccw_dev_id ccwid;
  2795. int level;
  2796. tid->chpid = card->info.chpid;
  2797. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2798. tid->ssid = ccwid.ssid;
  2799. tid->devno = ccwid.devno;
  2800. if (!info)
  2801. return;
  2802. level = stsi(NULL, 0, 0, 0);
  2803. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2804. tid->lparnr = info222->lpar_number;
  2805. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2806. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2807. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2808. }
  2809. free_page(info);
  2810. return;
  2811. }
  2812. static int qeth_hw_trap_cb(struct qeth_card *card,
  2813. struct qeth_reply *reply, unsigned long data)
  2814. {
  2815. struct qeth_ipa_cmd *cmd;
  2816. __u16 rc;
  2817. cmd = (struct qeth_ipa_cmd *)data;
  2818. rc = cmd->hdr.return_code;
  2819. if (rc)
  2820. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2821. return 0;
  2822. }
  2823. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2824. {
  2825. struct qeth_cmd_buffer *iob;
  2826. struct qeth_ipa_cmd *cmd;
  2827. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2828. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2829. if (!iob)
  2830. return -ENOMEM;
  2831. cmd = __ipa_cmd(iob);
  2832. cmd->data.diagass.subcmd_len = 80;
  2833. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2834. cmd->data.diagass.type = 1;
  2835. cmd->data.diagass.action = action;
  2836. switch (action) {
  2837. case QETH_DIAGS_TRAP_ARM:
  2838. cmd->data.diagass.options = 0x0003;
  2839. cmd->data.diagass.ext = 0x00010000 +
  2840. sizeof(struct qeth_trap_id);
  2841. qeth_get_trap_id(card,
  2842. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2843. break;
  2844. case QETH_DIAGS_TRAP_DISARM:
  2845. cmd->data.diagass.options = 0x0001;
  2846. break;
  2847. case QETH_DIAGS_TRAP_CAPTURE:
  2848. break;
  2849. }
  2850. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2851. }
  2852. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2853. static int qeth_check_qdio_errors(struct qeth_card *card,
  2854. struct qdio_buffer *buf,
  2855. unsigned int qdio_error,
  2856. const char *dbftext)
  2857. {
  2858. if (qdio_error) {
  2859. QETH_CARD_TEXT(card, 2, dbftext);
  2860. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2861. buf->element[15].sflags);
  2862. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2863. buf->element[14].sflags);
  2864. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2865. if ((buf->element[15].sflags) == 0x12) {
  2866. card->stats.rx_dropped++;
  2867. return 0;
  2868. } else
  2869. return 1;
  2870. }
  2871. return 0;
  2872. }
  2873. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2874. {
  2875. struct qeth_qdio_q *queue = card->qdio.in_q;
  2876. struct list_head *lh;
  2877. int count;
  2878. int i;
  2879. int rc;
  2880. int newcount = 0;
  2881. count = (index < queue->next_buf_to_init)?
  2882. card->qdio.in_buf_pool.buf_count -
  2883. (queue->next_buf_to_init - index) :
  2884. card->qdio.in_buf_pool.buf_count -
  2885. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2886. /* only requeue at a certain threshold to avoid SIGAs */
  2887. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2888. for (i = queue->next_buf_to_init;
  2889. i < queue->next_buf_to_init + count; ++i) {
  2890. if (qeth_init_input_buffer(card,
  2891. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2892. break;
  2893. } else {
  2894. newcount++;
  2895. }
  2896. }
  2897. if (newcount < count) {
  2898. /* we are in memory shortage so we switch back to
  2899. traditional skb allocation and drop packages */
  2900. atomic_set(&card->force_alloc_skb, 3);
  2901. count = newcount;
  2902. } else {
  2903. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2904. }
  2905. if (!count) {
  2906. i = 0;
  2907. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2908. i++;
  2909. if (i == card->qdio.in_buf_pool.buf_count) {
  2910. QETH_CARD_TEXT(card, 2, "qsarbw");
  2911. card->reclaim_index = index;
  2912. schedule_delayed_work(
  2913. &card->buffer_reclaim_work,
  2914. QETH_RECLAIM_WORK_TIME);
  2915. }
  2916. return;
  2917. }
  2918. /*
  2919. * according to old code it should be avoided to requeue all
  2920. * 128 buffers in order to benefit from PCI avoidance.
  2921. * this function keeps at least one buffer (the buffer at
  2922. * 'index') un-requeued -> this buffer is the first buffer that
  2923. * will be requeued the next time
  2924. */
  2925. if (card->options.performance_stats) {
  2926. card->perf_stats.inbound_do_qdio_cnt++;
  2927. card->perf_stats.inbound_do_qdio_start_time =
  2928. qeth_get_micros();
  2929. }
  2930. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2931. queue->next_buf_to_init, count);
  2932. if (card->options.performance_stats)
  2933. card->perf_stats.inbound_do_qdio_time +=
  2934. qeth_get_micros() -
  2935. card->perf_stats.inbound_do_qdio_start_time;
  2936. if (rc) {
  2937. QETH_CARD_TEXT(card, 2, "qinberr");
  2938. }
  2939. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2940. QDIO_MAX_BUFFERS_PER_Q;
  2941. }
  2942. }
  2943. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2944. {
  2945. struct qeth_card *card = container_of(work, struct qeth_card,
  2946. buffer_reclaim_work.work);
  2947. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2948. qeth_queue_input_buffer(card, card->reclaim_index);
  2949. }
  2950. static void qeth_handle_send_error(struct qeth_card *card,
  2951. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2952. {
  2953. int sbalf15 = buffer->buffer->element[15].sflags;
  2954. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2955. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2956. if (sbalf15 == 0) {
  2957. qdio_err = 0;
  2958. } else {
  2959. qdio_err = 1;
  2960. }
  2961. }
  2962. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2963. if (!qdio_err)
  2964. return;
  2965. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2966. return;
  2967. QETH_CARD_TEXT(card, 1, "lnkfail");
  2968. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2969. (u16)qdio_err, (u8)sbalf15);
  2970. }
  2971. /**
  2972. * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
  2973. * @queue: queue to check for packing buffer
  2974. *
  2975. * Returns number of buffers that were prepared for flush.
  2976. */
  2977. static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
  2978. {
  2979. struct qeth_qdio_out_buffer *buffer;
  2980. buffer = queue->bufs[queue->next_buf_to_fill];
  2981. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  2982. (buffer->next_element_to_fill > 0)) {
  2983. /* it's a packing buffer */
  2984. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  2985. queue->next_buf_to_fill =
  2986. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  2987. return 1;
  2988. }
  2989. return 0;
  2990. }
  2991. /*
  2992. * Switched to packing state if the number of used buffers on a queue
  2993. * reaches a certain limit.
  2994. */
  2995. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2996. {
  2997. if (!queue->do_pack) {
  2998. if (atomic_read(&queue->used_buffers)
  2999. >= QETH_HIGH_WATERMARK_PACK){
  3000. /* switch non-PACKING -> PACKING */
  3001. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3002. if (queue->card->options.performance_stats)
  3003. queue->card->perf_stats.sc_dp_p++;
  3004. queue->do_pack = 1;
  3005. }
  3006. }
  3007. }
  3008. /*
  3009. * Switches from packing to non-packing mode. If there is a packing
  3010. * buffer on the queue this buffer will be prepared to be flushed.
  3011. * In that case 1 is returned to inform the caller. If no buffer
  3012. * has to be flushed, zero is returned.
  3013. */
  3014. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3015. {
  3016. if (queue->do_pack) {
  3017. if (atomic_read(&queue->used_buffers)
  3018. <= QETH_LOW_WATERMARK_PACK) {
  3019. /* switch PACKING -> non-PACKING */
  3020. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3021. if (queue->card->options.performance_stats)
  3022. queue->card->perf_stats.sc_p_dp++;
  3023. queue->do_pack = 0;
  3024. return qeth_prep_flush_pack_buffer(queue);
  3025. }
  3026. }
  3027. return 0;
  3028. }
  3029. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3030. int count)
  3031. {
  3032. struct qeth_qdio_out_buffer *buf;
  3033. int rc;
  3034. int i;
  3035. unsigned int qdio_flags;
  3036. for (i = index; i < index + count; ++i) {
  3037. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3038. buf = queue->bufs[bidx];
  3039. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3040. SBAL_EFLAGS_LAST_ENTRY;
  3041. if (queue->bufstates)
  3042. queue->bufstates[bidx].user = buf;
  3043. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3044. continue;
  3045. if (!queue->do_pack) {
  3046. if ((atomic_read(&queue->used_buffers) >=
  3047. (QETH_HIGH_WATERMARK_PACK -
  3048. QETH_WATERMARK_PACK_FUZZ)) &&
  3049. !atomic_read(&queue->set_pci_flags_count)) {
  3050. /* it's likely that we'll go to packing
  3051. * mode soon */
  3052. atomic_inc(&queue->set_pci_flags_count);
  3053. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3054. }
  3055. } else {
  3056. if (!atomic_read(&queue->set_pci_flags_count)) {
  3057. /*
  3058. * there's no outstanding PCI any more, so we
  3059. * have to request a PCI to be sure the the PCI
  3060. * will wake at some time in the future then we
  3061. * can flush packed buffers that might still be
  3062. * hanging around, which can happen if no
  3063. * further send was requested by the stack
  3064. */
  3065. atomic_inc(&queue->set_pci_flags_count);
  3066. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3067. }
  3068. }
  3069. }
  3070. netif_trans_update(queue->card->dev);
  3071. if (queue->card->options.performance_stats) {
  3072. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3073. queue->card->perf_stats.outbound_do_qdio_start_time =
  3074. qeth_get_micros();
  3075. }
  3076. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3077. if (atomic_read(&queue->set_pci_flags_count))
  3078. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3079. atomic_add(count, &queue->used_buffers);
  3080. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3081. queue->queue_no, index, count);
  3082. if (queue->card->options.performance_stats)
  3083. queue->card->perf_stats.outbound_do_qdio_time +=
  3084. qeth_get_micros() -
  3085. queue->card->perf_stats.outbound_do_qdio_start_time;
  3086. if (rc) {
  3087. queue->card->stats.tx_errors += count;
  3088. /* ignore temporary SIGA errors without busy condition */
  3089. if (rc == -ENOBUFS)
  3090. return;
  3091. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3092. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3093. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3094. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3095. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3096. /* this must not happen under normal circumstances. if it
  3097. * happens something is really wrong -> recover */
  3098. qeth_schedule_recovery(queue->card);
  3099. return;
  3100. }
  3101. if (queue->card->options.performance_stats)
  3102. queue->card->perf_stats.bufs_sent += count;
  3103. }
  3104. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3105. {
  3106. int index;
  3107. int flush_cnt = 0;
  3108. int q_was_packing = 0;
  3109. /*
  3110. * check if weed have to switch to non-packing mode or if
  3111. * we have to get a pci flag out on the queue
  3112. */
  3113. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3114. !atomic_read(&queue->set_pci_flags_count)) {
  3115. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3116. QETH_OUT_Q_UNLOCKED) {
  3117. /*
  3118. * If we get in here, there was no action in
  3119. * do_send_packet. So, we check if there is a
  3120. * packing buffer to be flushed here.
  3121. */
  3122. netif_stop_queue(queue->card->dev);
  3123. index = queue->next_buf_to_fill;
  3124. q_was_packing = queue->do_pack;
  3125. /* queue->do_pack may change */
  3126. barrier();
  3127. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3128. if (!flush_cnt &&
  3129. !atomic_read(&queue->set_pci_flags_count))
  3130. flush_cnt += qeth_prep_flush_pack_buffer(queue);
  3131. if (queue->card->options.performance_stats &&
  3132. q_was_packing)
  3133. queue->card->perf_stats.bufs_sent_pack +=
  3134. flush_cnt;
  3135. if (flush_cnt)
  3136. qeth_flush_buffers(queue, index, flush_cnt);
  3137. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3138. }
  3139. }
  3140. }
  3141. static void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3142. unsigned long card_ptr)
  3143. {
  3144. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3145. if (card->dev->flags & IFF_UP)
  3146. napi_schedule(&card->napi);
  3147. }
  3148. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3149. {
  3150. int rc;
  3151. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3152. rc = -1;
  3153. goto out;
  3154. } else {
  3155. if (card->options.cq == cq) {
  3156. rc = 0;
  3157. goto out;
  3158. }
  3159. if (card->state != CARD_STATE_DOWN &&
  3160. card->state != CARD_STATE_RECOVER) {
  3161. rc = -1;
  3162. goto out;
  3163. }
  3164. qeth_free_qdio_buffers(card);
  3165. card->options.cq = cq;
  3166. rc = 0;
  3167. }
  3168. out:
  3169. return rc;
  3170. }
  3171. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3172. static void qeth_qdio_cq_handler(struct qeth_card *card, unsigned int qdio_err,
  3173. unsigned int queue, int first_element,
  3174. int count)
  3175. {
  3176. struct qeth_qdio_q *cq = card->qdio.c_q;
  3177. int i;
  3178. int rc;
  3179. if (!qeth_is_cq(card, queue))
  3180. goto out;
  3181. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3182. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3183. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3184. if (qdio_err) {
  3185. netif_stop_queue(card->dev);
  3186. qeth_schedule_recovery(card);
  3187. goto out;
  3188. }
  3189. if (card->options.performance_stats) {
  3190. card->perf_stats.cq_cnt++;
  3191. card->perf_stats.cq_start_time = qeth_get_micros();
  3192. }
  3193. for (i = first_element; i < first_element + count; ++i) {
  3194. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3195. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3196. int e = 0;
  3197. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3198. buffer->element[e].addr) {
  3199. unsigned long phys_aob_addr;
  3200. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3201. qeth_qdio_handle_aob(card, phys_aob_addr);
  3202. ++e;
  3203. }
  3204. qeth_scrub_qdio_buffer(buffer, QDIO_MAX_ELEMENTS_PER_BUFFER);
  3205. }
  3206. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3207. card->qdio.c_q->next_buf_to_init,
  3208. count);
  3209. if (rc) {
  3210. dev_warn(&card->gdev->dev,
  3211. "QDIO reported an error, rc=%i\n", rc);
  3212. QETH_CARD_TEXT(card, 2, "qcqherr");
  3213. }
  3214. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3215. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3216. netif_wake_queue(card->dev);
  3217. if (card->options.performance_stats) {
  3218. int delta_t = qeth_get_micros();
  3219. delta_t -= card->perf_stats.cq_start_time;
  3220. card->perf_stats.cq_time += delta_t;
  3221. }
  3222. out:
  3223. return;
  3224. }
  3225. static void qeth_qdio_input_handler(struct ccw_device *ccwdev,
  3226. unsigned int qdio_err, int queue,
  3227. int first_elem, int count,
  3228. unsigned long card_ptr)
  3229. {
  3230. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3231. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3232. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3233. if (qeth_is_cq(card, queue))
  3234. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3235. else if (qdio_err)
  3236. qeth_schedule_recovery(card);
  3237. }
  3238. static void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3239. unsigned int qdio_error, int __queue,
  3240. int first_element, int count,
  3241. unsigned long card_ptr)
  3242. {
  3243. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3244. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3245. struct qeth_qdio_out_buffer *buffer;
  3246. int i;
  3247. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3248. if (qdio_error & QDIO_ERROR_FATAL) {
  3249. QETH_CARD_TEXT(card, 2, "achkcond");
  3250. netif_stop_queue(card->dev);
  3251. qeth_schedule_recovery(card);
  3252. return;
  3253. }
  3254. if (card->options.performance_stats) {
  3255. card->perf_stats.outbound_handler_cnt++;
  3256. card->perf_stats.outbound_handler_start_time =
  3257. qeth_get_micros();
  3258. }
  3259. for (i = first_element; i < (first_element + count); ++i) {
  3260. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3261. buffer = queue->bufs[bidx];
  3262. qeth_handle_send_error(card, buffer, qdio_error);
  3263. if (queue->bufstates &&
  3264. (queue->bufstates[bidx].flags &
  3265. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3266. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3267. if (atomic_cmpxchg(&buffer->state,
  3268. QETH_QDIO_BUF_PRIMED,
  3269. QETH_QDIO_BUF_PENDING) ==
  3270. QETH_QDIO_BUF_PRIMED) {
  3271. qeth_notify_skbs(queue, buffer,
  3272. TX_NOTIFY_PENDING);
  3273. }
  3274. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3275. /* prepare the queue slot for re-use: */
  3276. qeth_scrub_qdio_buffer(buffer->buffer,
  3277. QETH_MAX_BUFFER_ELEMENTS(card));
  3278. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3279. QETH_CARD_TEXT(card, 2, "outofbuf");
  3280. qeth_schedule_recovery(card);
  3281. }
  3282. } else {
  3283. if (card->options.cq == QETH_CQ_ENABLED) {
  3284. enum iucv_tx_notify n;
  3285. n = qeth_compute_cq_notification(
  3286. buffer->buffer->element[15].sflags, 0);
  3287. qeth_notify_skbs(queue, buffer, n);
  3288. }
  3289. qeth_clear_output_buffer(queue, buffer);
  3290. }
  3291. qeth_cleanup_handled_pending(queue, bidx, 0);
  3292. }
  3293. atomic_sub(count, &queue->used_buffers);
  3294. /* check if we need to do something on this outbound queue */
  3295. if (card->info.type != QETH_CARD_TYPE_IQD)
  3296. qeth_check_outbound_queue(queue);
  3297. netif_wake_queue(queue->card->dev);
  3298. if (card->options.performance_stats)
  3299. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3300. card->perf_stats.outbound_handler_start_time;
  3301. }
  3302. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3303. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3304. {
  3305. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3306. return 2;
  3307. return queue_num;
  3308. }
  3309. /**
  3310. * Note: Function assumes that we have 4 outbound queues.
  3311. */
  3312. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3313. int ipv)
  3314. {
  3315. __be16 *tci;
  3316. u8 tos;
  3317. switch (card->qdio.do_prio_queueing) {
  3318. case QETH_PRIO_Q_ING_TOS:
  3319. case QETH_PRIO_Q_ING_PREC:
  3320. switch (ipv) {
  3321. case 4:
  3322. tos = ipv4_get_dsfield(ip_hdr(skb));
  3323. break;
  3324. case 6:
  3325. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3326. break;
  3327. default:
  3328. return card->qdio.default_out_queue;
  3329. }
  3330. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3331. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3332. if (tos & IPTOS_MINCOST)
  3333. return qeth_cut_iqd_prio(card, 3);
  3334. if (tos & IPTOS_RELIABILITY)
  3335. return 2;
  3336. if (tos & IPTOS_THROUGHPUT)
  3337. return 1;
  3338. if (tos & IPTOS_LOWDELAY)
  3339. return 0;
  3340. break;
  3341. case QETH_PRIO_Q_ING_SKB:
  3342. if (skb->priority > 5)
  3343. return 0;
  3344. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3345. case QETH_PRIO_Q_ING_VLAN:
  3346. tci = &((struct ethhdr *)skb->data)->h_proto;
  3347. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3348. return qeth_cut_iqd_prio(card,
  3349. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3350. break;
  3351. default:
  3352. break;
  3353. }
  3354. return card->qdio.default_out_queue;
  3355. }
  3356. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3357. /**
  3358. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3359. * @skb: SKB address
  3360. *
  3361. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3362. * fragmented part of the SKB. Returns zero for linear SKB.
  3363. */
  3364. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3365. {
  3366. int cnt, elements = 0;
  3367. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3368. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3369. elements += qeth_get_elements_for_range(
  3370. (addr_t)skb_frag_address(frag),
  3371. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3372. }
  3373. return elements;
  3374. }
  3375. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3376. static unsigned int qeth_count_elements(struct sk_buff *skb, int data_offset)
  3377. {
  3378. unsigned int elements = qeth_get_elements_for_frags(skb);
  3379. addr_t end = (addr_t)skb->data + skb_headlen(skb);
  3380. addr_t start = (addr_t)skb->data + data_offset;
  3381. if (start != end)
  3382. elements += qeth_get_elements_for_range(start, end);
  3383. return elements;
  3384. }
  3385. /**
  3386. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3387. * @card: qeth card structure, to check max. elems.
  3388. * @skb: SKB address
  3389. * @extra_elems: extra elems needed, to check against max.
  3390. * @data_offset: range starts at skb->data + data_offset
  3391. *
  3392. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3393. * skb data, including linear part and fragments. Checks if the result plus
  3394. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3395. * Note: extra_elems is not included in the returned result.
  3396. */
  3397. int qeth_get_elements_no(struct qeth_card *card,
  3398. struct sk_buff *skb, int extra_elems, int data_offset)
  3399. {
  3400. int elements = qeth_count_elements(skb, data_offset);
  3401. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3402. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3403. "(Number=%d / Length=%d). Discarded.\n",
  3404. elements + extra_elems, skb->len);
  3405. return 0;
  3406. }
  3407. return elements;
  3408. }
  3409. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3410. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3411. {
  3412. int hroom, inpage, rest;
  3413. if (((unsigned long)skb->data & PAGE_MASK) !=
  3414. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3415. hroom = skb_headroom(skb);
  3416. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3417. rest = len - inpage;
  3418. if (rest > hroom)
  3419. return 1;
  3420. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3421. skb->data -= rest;
  3422. skb->tail -= rest;
  3423. *hdr = (struct qeth_hdr *)skb->data;
  3424. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3425. }
  3426. return 0;
  3427. }
  3428. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3429. /**
  3430. * qeth_add_hw_header() - add a HW header to an skb.
  3431. * @skb: skb that the HW header should be added to.
  3432. * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
  3433. * it contains a valid pointer to a qeth_hdr.
  3434. * @hdr_len: length of the HW header.
  3435. * @proto_len: length of protocol headers that need to be in same page as the
  3436. * HW header.
  3437. *
  3438. * Returns the pushed length. If the header can't be pushed on
  3439. * (eg. because it would cross a page boundary), it is allocated from
  3440. * the cache instead and 0 is returned.
  3441. * The number of needed buffer elements is returned in @elements.
  3442. * Error to create the hdr is indicated by returning with < 0.
  3443. */
  3444. int qeth_add_hw_header(struct qeth_card *card, struct sk_buff *skb,
  3445. struct qeth_hdr **hdr, unsigned int hdr_len,
  3446. unsigned int proto_len, unsigned int *elements)
  3447. {
  3448. const unsigned int max_elements = QETH_MAX_BUFFER_ELEMENTS(card);
  3449. const unsigned int contiguous = proto_len ? proto_len : 1;
  3450. unsigned int __elements;
  3451. addr_t start, end;
  3452. bool push_ok;
  3453. int rc;
  3454. check_layout:
  3455. start = (addr_t)skb->data - hdr_len;
  3456. end = (addr_t)skb->data;
  3457. if (qeth_get_elements_for_range(start, end + contiguous) == 1) {
  3458. /* Push HW header into same page as first protocol header. */
  3459. push_ok = true;
  3460. __elements = qeth_count_elements(skb, 0);
  3461. } else if (!proto_len && qeth_get_elements_for_range(start, end) == 1) {
  3462. /* Push HW header into a new page. */
  3463. push_ok = true;
  3464. __elements = 1 + qeth_count_elements(skb, 0);
  3465. } else {
  3466. /* Use header cache, copy protocol headers up. */
  3467. push_ok = false;
  3468. __elements = 1 + qeth_count_elements(skb, proto_len);
  3469. }
  3470. /* Compress skb to fit into one IO buffer: */
  3471. if (__elements > max_elements) {
  3472. if (!skb_is_nonlinear(skb)) {
  3473. /* Drop it, no easy way of shrinking it further. */
  3474. QETH_DBF_MESSAGE(2, "Dropped an oversized skb (Max Elements=%u / Actual=%u / Length=%u).\n",
  3475. max_elements, __elements, skb->len);
  3476. return -E2BIG;
  3477. }
  3478. rc = skb_linearize(skb);
  3479. if (card->options.performance_stats) {
  3480. if (rc)
  3481. card->perf_stats.tx_linfail++;
  3482. else
  3483. card->perf_stats.tx_lin++;
  3484. }
  3485. if (rc)
  3486. return rc;
  3487. /* Linearization changed the layout, re-evaluate: */
  3488. goto check_layout;
  3489. }
  3490. *elements = __elements;
  3491. /* Add the header: */
  3492. if (push_ok) {
  3493. *hdr = skb_push(skb, hdr_len);
  3494. return hdr_len;
  3495. }
  3496. /* fall back */
  3497. *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
  3498. if (!*hdr)
  3499. return -ENOMEM;
  3500. /* Copy protocol headers behind HW header: */
  3501. skb_copy_from_linear_data(skb, ((char *)*hdr) + hdr_len, proto_len);
  3502. return 0;
  3503. }
  3504. EXPORT_SYMBOL_GPL(qeth_add_hw_header);
  3505. static void __qeth_fill_buffer(struct sk_buff *skb,
  3506. struct qeth_qdio_out_buffer *buf,
  3507. bool is_first_elem, unsigned int offset)
  3508. {
  3509. struct qdio_buffer *buffer = buf->buffer;
  3510. int element = buf->next_element_to_fill;
  3511. int length = skb_headlen(skb) - offset;
  3512. char *data = skb->data + offset;
  3513. int length_here, cnt;
  3514. /* map linear part into buffer element(s) */
  3515. while (length > 0) {
  3516. /* length_here is the remaining amount of data in this page */
  3517. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3518. if (length < length_here)
  3519. length_here = length;
  3520. buffer->element[element].addr = data;
  3521. buffer->element[element].length = length_here;
  3522. length -= length_here;
  3523. if (is_first_elem) {
  3524. is_first_elem = false;
  3525. if (length || skb_is_nonlinear(skb))
  3526. /* skb needs additional elements */
  3527. buffer->element[element].eflags =
  3528. SBAL_EFLAGS_FIRST_FRAG;
  3529. else
  3530. buffer->element[element].eflags = 0;
  3531. } else {
  3532. buffer->element[element].eflags =
  3533. SBAL_EFLAGS_MIDDLE_FRAG;
  3534. }
  3535. data += length_here;
  3536. element++;
  3537. }
  3538. /* map page frags into buffer element(s) */
  3539. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3540. skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
  3541. data = skb_frag_address(frag);
  3542. length = skb_frag_size(frag);
  3543. while (length > 0) {
  3544. length_here = PAGE_SIZE -
  3545. ((unsigned long) data % PAGE_SIZE);
  3546. if (length < length_here)
  3547. length_here = length;
  3548. buffer->element[element].addr = data;
  3549. buffer->element[element].length = length_here;
  3550. buffer->element[element].eflags =
  3551. SBAL_EFLAGS_MIDDLE_FRAG;
  3552. length -= length_here;
  3553. data += length_here;
  3554. element++;
  3555. }
  3556. }
  3557. if (buffer->element[element - 1].eflags)
  3558. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3559. buf->next_element_to_fill = element;
  3560. }
  3561. /**
  3562. * qeth_fill_buffer() - map skb into an output buffer
  3563. * @queue: QDIO queue to submit the buffer on
  3564. * @buf: buffer to transport the skb
  3565. * @skb: skb to map into the buffer
  3566. * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
  3567. * from qeth_core_header_cache.
  3568. * @offset: when mapping the skb, start at skb->data + offset
  3569. * @hd_len: if > 0, build a dedicated header element of this size
  3570. */
  3571. static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3572. struct qeth_qdio_out_buffer *buf,
  3573. struct sk_buff *skb, struct qeth_hdr *hdr,
  3574. unsigned int offset, unsigned int hd_len)
  3575. {
  3576. struct qdio_buffer *buffer = buf->buffer;
  3577. bool is_first_elem = true;
  3578. int flush_cnt = 0;
  3579. refcount_inc(&skb->users);
  3580. skb_queue_tail(&buf->skb_list, skb);
  3581. /* build dedicated header element */
  3582. if (hd_len) {
  3583. int element = buf->next_element_to_fill;
  3584. is_first_elem = false;
  3585. buffer->element[element].addr = hdr;
  3586. buffer->element[element].length = hd_len;
  3587. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3588. /* remember to free cache-allocated qeth_hdr: */
  3589. buf->is_header[element] = ((void *)hdr != skb->data);
  3590. buf->next_element_to_fill++;
  3591. }
  3592. __qeth_fill_buffer(skb, buf, is_first_elem, offset);
  3593. if (!queue->do_pack) {
  3594. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3595. /* set state to PRIMED -> will be flushed */
  3596. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3597. flush_cnt = 1;
  3598. } else {
  3599. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3600. if (queue->card->options.performance_stats)
  3601. queue->card->perf_stats.skbs_sent_pack++;
  3602. if (buf->next_element_to_fill >=
  3603. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3604. /*
  3605. * packed buffer if full -> set state PRIMED
  3606. * -> will be flushed
  3607. */
  3608. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3609. flush_cnt = 1;
  3610. }
  3611. }
  3612. return flush_cnt;
  3613. }
  3614. int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3615. struct qeth_hdr *hdr, unsigned int offset,
  3616. unsigned int hd_len)
  3617. {
  3618. int index = queue->next_buf_to_fill;
  3619. struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
  3620. /*
  3621. * check if buffer is empty to make sure that we do not 'overtake'
  3622. * ourselves and try to fill a buffer that is already primed
  3623. */
  3624. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3625. return -EBUSY;
  3626. queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3627. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3628. qeth_flush_buffers(queue, index, 1);
  3629. return 0;
  3630. }
  3631. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3632. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3633. struct sk_buff *skb, struct qeth_hdr *hdr,
  3634. unsigned int offset, unsigned int hd_len,
  3635. int elements_needed)
  3636. {
  3637. struct qeth_qdio_out_buffer *buffer;
  3638. int start_index;
  3639. int flush_count = 0;
  3640. int do_pack = 0;
  3641. int tmp;
  3642. int rc = 0;
  3643. /* spin until we get the queue ... */
  3644. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3645. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3646. start_index = queue->next_buf_to_fill;
  3647. buffer = queue->bufs[queue->next_buf_to_fill];
  3648. /*
  3649. * check if buffer is empty to make sure that we do not 'overtake'
  3650. * ourselves and try to fill a buffer that is already primed
  3651. */
  3652. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3653. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3654. return -EBUSY;
  3655. }
  3656. /* check if we need to switch packing state of this queue */
  3657. qeth_switch_to_packing_if_needed(queue);
  3658. if (queue->do_pack) {
  3659. do_pack = 1;
  3660. /* does packet fit in current buffer? */
  3661. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3662. buffer->next_element_to_fill) < elements_needed) {
  3663. /* ... no -> set state PRIMED */
  3664. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3665. flush_count++;
  3666. queue->next_buf_to_fill =
  3667. (queue->next_buf_to_fill + 1) %
  3668. QDIO_MAX_BUFFERS_PER_Q;
  3669. buffer = queue->bufs[queue->next_buf_to_fill];
  3670. /* we did a step forward, so check buffer state
  3671. * again */
  3672. if (atomic_read(&buffer->state) !=
  3673. QETH_QDIO_BUF_EMPTY) {
  3674. qeth_flush_buffers(queue, start_index,
  3675. flush_count);
  3676. atomic_set(&queue->state,
  3677. QETH_OUT_Q_UNLOCKED);
  3678. rc = -EBUSY;
  3679. goto out;
  3680. }
  3681. }
  3682. }
  3683. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3684. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3685. QDIO_MAX_BUFFERS_PER_Q;
  3686. flush_count += tmp;
  3687. if (flush_count)
  3688. qeth_flush_buffers(queue, start_index, flush_count);
  3689. else if (!atomic_read(&queue->set_pci_flags_count))
  3690. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3691. /*
  3692. * queue->state will go from LOCKED -> UNLOCKED or from
  3693. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3694. * (switch packing state or flush buffer to get another pci flag out).
  3695. * In that case we will enter this loop
  3696. */
  3697. while (atomic_dec_return(&queue->state)) {
  3698. start_index = queue->next_buf_to_fill;
  3699. /* check if we can go back to non-packing state */
  3700. tmp = qeth_switch_to_nonpacking_if_needed(queue);
  3701. /*
  3702. * check if we need to flush a packing buffer to get a pci
  3703. * flag out on the queue
  3704. */
  3705. if (!tmp && !atomic_read(&queue->set_pci_flags_count))
  3706. tmp = qeth_prep_flush_pack_buffer(queue);
  3707. if (tmp) {
  3708. qeth_flush_buffers(queue, start_index, tmp);
  3709. flush_count += tmp;
  3710. }
  3711. }
  3712. out:
  3713. /* at this point the queue is UNLOCKED again */
  3714. if (queue->card->options.performance_stats && do_pack)
  3715. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3716. return rc;
  3717. }
  3718. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3719. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3720. struct qeth_reply *reply, unsigned long data)
  3721. {
  3722. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3723. struct qeth_ipacmd_setadpparms *setparms;
  3724. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3725. setparms = &(cmd->data.setadapterparms);
  3726. if (qeth_setadpparms_inspect_rc(cmd)) {
  3727. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3728. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3729. }
  3730. card->info.promisc_mode = setparms->data.mode;
  3731. return 0;
  3732. }
  3733. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3734. {
  3735. enum qeth_ipa_promisc_modes mode;
  3736. struct net_device *dev = card->dev;
  3737. struct qeth_cmd_buffer *iob;
  3738. struct qeth_ipa_cmd *cmd;
  3739. QETH_CARD_TEXT(card, 4, "setprom");
  3740. if (((dev->flags & IFF_PROMISC) &&
  3741. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3742. (!(dev->flags & IFF_PROMISC) &&
  3743. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3744. return;
  3745. mode = SET_PROMISC_MODE_OFF;
  3746. if (dev->flags & IFF_PROMISC)
  3747. mode = SET_PROMISC_MODE_ON;
  3748. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3749. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3750. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3751. if (!iob)
  3752. return;
  3753. cmd = __ipa_cmd(iob);
  3754. cmd->data.setadapterparms.data.mode = mode;
  3755. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3756. }
  3757. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3758. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3759. {
  3760. struct qeth_card *card;
  3761. card = dev->ml_priv;
  3762. QETH_CARD_TEXT(card, 5, "getstat");
  3763. return &card->stats;
  3764. }
  3765. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3766. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3767. struct qeth_reply *reply, unsigned long data)
  3768. {
  3769. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3770. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3771. if (qeth_setadpparms_inspect_rc(cmd))
  3772. return 0;
  3773. if (!card->options.layer2 ||
  3774. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3775. ether_addr_copy(card->dev->dev_addr,
  3776. cmd->data.setadapterparms.data.change_addr.addr);
  3777. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3778. }
  3779. return 0;
  3780. }
  3781. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3782. {
  3783. int rc;
  3784. struct qeth_cmd_buffer *iob;
  3785. struct qeth_ipa_cmd *cmd;
  3786. QETH_CARD_TEXT(card, 4, "chgmac");
  3787. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3788. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3789. sizeof(struct qeth_change_addr));
  3790. if (!iob)
  3791. return -ENOMEM;
  3792. cmd = __ipa_cmd(iob);
  3793. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3794. cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
  3795. ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
  3796. card->dev->dev_addr);
  3797. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3798. NULL);
  3799. return rc;
  3800. }
  3801. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3802. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3803. struct qeth_reply *reply, unsigned long data)
  3804. {
  3805. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3806. struct qeth_set_access_ctrl *access_ctrl_req;
  3807. int fallback = *(int *)reply->param;
  3808. QETH_CARD_TEXT(card, 4, "setaccb");
  3809. if (cmd->hdr.return_code)
  3810. return 0;
  3811. qeth_setadpparms_inspect_rc(cmd);
  3812. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3813. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3814. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3815. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3816. cmd->data.setadapterparms.hdr.return_code);
  3817. if (cmd->data.setadapterparms.hdr.return_code !=
  3818. SET_ACCESS_CTRL_RC_SUCCESS)
  3819. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3820. card->gdev->dev.kobj.name,
  3821. access_ctrl_req->subcmd_code,
  3822. cmd->data.setadapterparms.hdr.return_code);
  3823. switch (cmd->data.setadapterparms.hdr.return_code) {
  3824. case SET_ACCESS_CTRL_RC_SUCCESS:
  3825. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3826. dev_info(&card->gdev->dev,
  3827. "QDIO data connection isolation is deactivated\n");
  3828. } else {
  3829. dev_info(&card->gdev->dev,
  3830. "QDIO data connection isolation is activated\n");
  3831. }
  3832. break;
  3833. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3834. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3835. "deactivated\n", dev_name(&card->gdev->dev));
  3836. if (fallback)
  3837. card->options.isolation = card->options.prev_isolation;
  3838. break;
  3839. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3840. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3841. " activated\n", dev_name(&card->gdev->dev));
  3842. if (fallback)
  3843. card->options.isolation = card->options.prev_isolation;
  3844. break;
  3845. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3846. dev_err(&card->gdev->dev, "Adapter does not "
  3847. "support QDIO data connection isolation\n");
  3848. break;
  3849. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3850. dev_err(&card->gdev->dev,
  3851. "Adapter is dedicated. "
  3852. "QDIO data connection isolation not supported\n");
  3853. if (fallback)
  3854. card->options.isolation = card->options.prev_isolation;
  3855. break;
  3856. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3857. dev_err(&card->gdev->dev,
  3858. "TSO does not permit QDIO data connection isolation\n");
  3859. if (fallback)
  3860. card->options.isolation = card->options.prev_isolation;
  3861. break;
  3862. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3863. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3864. "support reflective relay mode\n");
  3865. if (fallback)
  3866. card->options.isolation = card->options.prev_isolation;
  3867. break;
  3868. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3869. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3870. "enabled at the adjacent switch port");
  3871. if (fallback)
  3872. card->options.isolation = card->options.prev_isolation;
  3873. break;
  3874. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3875. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3876. "at the adjacent switch failed\n");
  3877. break;
  3878. default:
  3879. /* this should never happen */
  3880. if (fallback)
  3881. card->options.isolation = card->options.prev_isolation;
  3882. break;
  3883. }
  3884. return 0;
  3885. }
  3886. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3887. enum qeth_ipa_isolation_modes isolation, int fallback)
  3888. {
  3889. int rc;
  3890. struct qeth_cmd_buffer *iob;
  3891. struct qeth_ipa_cmd *cmd;
  3892. struct qeth_set_access_ctrl *access_ctrl_req;
  3893. QETH_CARD_TEXT(card, 4, "setacctl");
  3894. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3895. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3896. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3897. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3898. sizeof(struct qeth_set_access_ctrl));
  3899. if (!iob)
  3900. return -ENOMEM;
  3901. cmd = __ipa_cmd(iob);
  3902. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3903. access_ctrl_req->subcmd_code = isolation;
  3904. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3905. &fallback);
  3906. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3907. return rc;
  3908. }
  3909. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3910. {
  3911. int rc = 0;
  3912. QETH_CARD_TEXT(card, 4, "setactlo");
  3913. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3914. card->info.type == QETH_CARD_TYPE_OSX) &&
  3915. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3916. rc = qeth_setadpparms_set_access_ctrl(card,
  3917. card->options.isolation, fallback);
  3918. if (rc) {
  3919. QETH_DBF_MESSAGE(3,
  3920. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3921. card->gdev->dev.kobj.name,
  3922. rc);
  3923. rc = -EOPNOTSUPP;
  3924. }
  3925. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3926. card->options.isolation = ISOLATION_MODE_NONE;
  3927. dev_err(&card->gdev->dev, "Adapter does not "
  3928. "support QDIO data connection isolation\n");
  3929. rc = -EOPNOTSUPP;
  3930. }
  3931. return rc;
  3932. }
  3933. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3934. void qeth_tx_timeout(struct net_device *dev)
  3935. {
  3936. struct qeth_card *card;
  3937. card = dev->ml_priv;
  3938. QETH_CARD_TEXT(card, 4, "txtimeo");
  3939. card->stats.tx_errors++;
  3940. qeth_schedule_recovery(card);
  3941. }
  3942. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3943. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3944. {
  3945. struct qeth_card *card = dev->ml_priv;
  3946. int rc = 0;
  3947. switch (regnum) {
  3948. case MII_BMCR: /* Basic mode control register */
  3949. rc = BMCR_FULLDPLX;
  3950. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3951. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3952. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3953. rc |= BMCR_SPEED100;
  3954. break;
  3955. case MII_BMSR: /* Basic mode status register */
  3956. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3957. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3958. BMSR_100BASE4;
  3959. break;
  3960. case MII_PHYSID1: /* PHYS ID 1 */
  3961. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3962. dev->dev_addr[2];
  3963. rc = (rc >> 5) & 0xFFFF;
  3964. break;
  3965. case MII_PHYSID2: /* PHYS ID 2 */
  3966. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3967. break;
  3968. case MII_ADVERTISE: /* Advertisement control reg */
  3969. rc = ADVERTISE_ALL;
  3970. break;
  3971. case MII_LPA: /* Link partner ability reg */
  3972. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3973. LPA_100BASE4 | LPA_LPACK;
  3974. break;
  3975. case MII_EXPANSION: /* Expansion register */
  3976. break;
  3977. case MII_DCOUNTER: /* disconnect counter */
  3978. break;
  3979. case MII_FCSCOUNTER: /* false carrier counter */
  3980. break;
  3981. case MII_NWAYTEST: /* N-way auto-neg test register */
  3982. break;
  3983. case MII_RERRCOUNTER: /* rx error counter */
  3984. rc = card->stats.rx_errors;
  3985. break;
  3986. case MII_SREVISION: /* silicon revision */
  3987. break;
  3988. case MII_RESV1: /* reserved 1 */
  3989. break;
  3990. case MII_LBRERROR: /* loopback, rx, bypass error */
  3991. break;
  3992. case MII_PHYADDR: /* physical address */
  3993. break;
  3994. case MII_RESV2: /* reserved 2 */
  3995. break;
  3996. case MII_TPISTATUS: /* TPI status for 10mbps */
  3997. break;
  3998. case MII_NCONFIG: /* network interface config */
  3999. break;
  4000. default:
  4001. break;
  4002. }
  4003. return rc;
  4004. }
  4005. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4006. struct qeth_cmd_buffer *iob, int len,
  4007. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4008. unsigned long),
  4009. void *reply_param)
  4010. {
  4011. u16 s1, s2;
  4012. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4013. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4014. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4015. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4016. /* adjust PDU length fields in IPA_PDU_HEADER */
  4017. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4018. s2 = (u32) len;
  4019. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4020. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4021. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4022. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4023. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4024. reply_cb, reply_param);
  4025. }
  4026. static int qeth_snmp_command_cb(struct qeth_card *card,
  4027. struct qeth_reply *reply, unsigned long sdata)
  4028. {
  4029. struct qeth_ipa_cmd *cmd;
  4030. struct qeth_arp_query_info *qinfo;
  4031. unsigned char *data;
  4032. void *snmp_data;
  4033. __u16 data_len;
  4034. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4035. cmd = (struct qeth_ipa_cmd *) sdata;
  4036. data = (unsigned char *)((char *)cmd - reply->offset);
  4037. qinfo = (struct qeth_arp_query_info *) reply->param;
  4038. if (cmd->hdr.return_code) {
  4039. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4040. return 0;
  4041. }
  4042. if (cmd->data.setadapterparms.hdr.return_code) {
  4043. cmd->hdr.return_code =
  4044. cmd->data.setadapterparms.hdr.return_code;
  4045. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4046. return 0;
  4047. }
  4048. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4049. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4050. snmp_data = &cmd->data.setadapterparms.data.snmp;
  4051. data_len -= offsetof(struct qeth_ipa_cmd,
  4052. data.setadapterparms.data.snmp);
  4053. } else {
  4054. snmp_data = &cmd->data.setadapterparms.data.snmp.request;
  4055. data_len -= offsetof(struct qeth_ipa_cmd,
  4056. data.setadapterparms.data.snmp.request);
  4057. }
  4058. /* check if there is enough room in userspace */
  4059. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4060. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4061. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4062. return 0;
  4063. }
  4064. QETH_CARD_TEXT_(card, 4, "snore%i",
  4065. cmd->data.setadapterparms.hdr.used_total);
  4066. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4067. cmd->data.setadapterparms.hdr.seq_no);
  4068. /*copy entries to user buffer*/
  4069. memcpy(qinfo->udata + qinfo->udata_offset, snmp_data, data_len);
  4070. qinfo->udata_offset += data_len;
  4071. /* check if all replies received ... */
  4072. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4073. cmd->data.setadapterparms.hdr.used_total);
  4074. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4075. cmd->data.setadapterparms.hdr.seq_no);
  4076. if (cmd->data.setadapterparms.hdr.seq_no <
  4077. cmd->data.setadapterparms.hdr.used_total)
  4078. return 1;
  4079. return 0;
  4080. }
  4081. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4082. {
  4083. struct qeth_cmd_buffer *iob;
  4084. struct qeth_ipa_cmd *cmd;
  4085. struct qeth_snmp_ureq *ureq;
  4086. unsigned int req_len;
  4087. struct qeth_arp_query_info qinfo = {0, };
  4088. int rc = 0;
  4089. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4090. if (card->info.guestlan)
  4091. return -EOPNOTSUPP;
  4092. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4093. (!card->options.layer2)) {
  4094. return -EOPNOTSUPP;
  4095. }
  4096. /* skip 4 bytes (data_len struct member) to get req_len */
  4097. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4098. return -EFAULT;
  4099. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4100. sizeof(struct qeth_ipacmd_hdr) -
  4101. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4102. return -EINVAL;
  4103. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4104. if (IS_ERR(ureq)) {
  4105. QETH_CARD_TEXT(card, 2, "snmpnome");
  4106. return PTR_ERR(ureq);
  4107. }
  4108. qinfo.udata_len = ureq->hdr.data_len;
  4109. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4110. if (!qinfo.udata) {
  4111. kfree(ureq);
  4112. return -ENOMEM;
  4113. }
  4114. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4115. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4116. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4117. if (!iob) {
  4118. rc = -ENOMEM;
  4119. goto out;
  4120. }
  4121. cmd = __ipa_cmd(iob);
  4122. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4123. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4124. qeth_snmp_command_cb, (void *)&qinfo);
  4125. if (rc)
  4126. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4127. QETH_CARD_IFNAME(card), rc);
  4128. else {
  4129. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4130. rc = -EFAULT;
  4131. }
  4132. out:
  4133. kfree(ureq);
  4134. kfree(qinfo.udata);
  4135. return rc;
  4136. }
  4137. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4138. struct qeth_reply *reply, unsigned long data)
  4139. {
  4140. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4141. struct qeth_qoat_priv *priv;
  4142. char *resdata;
  4143. int resdatalen;
  4144. QETH_CARD_TEXT(card, 3, "qoatcb");
  4145. if (qeth_setadpparms_inspect_rc(cmd))
  4146. return 0;
  4147. priv = (struct qeth_qoat_priv *)reply->param;
  4148. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4149. resdata = (char *)data + 28;
  4150. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4151. cmd->hdr.return_code = IPA_RC_FFFF;
  4152. return 0;
  4153. }
  4154. memcpy((priv->buffer + priv->response_len), resdata,
  4155. resdatalen);
  4156. priv->response_len += resdatalen;
  4157. if (cmd->data.setadapterparms.hdr.seq_no <
  4158. cmd->data.setadapterparms.hdr.used_total)
  4159. return 1;
  4160. return 0;
  4161. }
  4162. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4163. {
  4164. int rc = 0;
  4165. struct qeth_cmd_buffer *iob;
  4166. struct qeth_ipa_cmd *cmd;
  4167. struct qeth_query_oat *oat_req;
  4168. struct qeth_query_oat_data oat_data;
  4169. struct qeth_qoat_priv priv;
  4170. void __user *tmp;
  4171. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4172. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4173. rc = -EOPNOTSUPP;
  4174. goto out;
  4175. }
  4176. if (copy_from_user(&oat_data, udata,
  4177. sizeof(struct qeth_query_oat_data))) {
  4178. rc = -EFAULT;
  4179. goto out;
  4180. }
  4181. priv.buffer_len = oat_data.buffer_len;
  4182. priv.response_len = 0;
  4183. priv.buffer = vzalloc(oat_data.buffer_len);
  4184. if (!priv.buffer) {
  4185. rc = -ENOMEM;
  4186. goto out;
  4187. }
  4188. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4189. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4190. sizeof(struct qeth_query_oat));
  4191. if (!iob) {
  4192. rc = -ENOMEM;
  4193. goto out_free;
  4194. }
  4195. cmd = __ipa_cmd(iob);
  4196. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4197. oat_req->subcmd_code = oat_data.command;
  4198. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4199. &priv);
  4200. if (!rc) {
  4201. if (is_compat_task())
  4202. tmp = compat_ptr(oat_data.ptr);
  4203. else
  4204. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4205. if (copy_to_user(tmp, priv.buffer,
  4206. priv.response_len)) {
  4207. rc = -EFAULT;
  4208. goto out_free;
  4209. }
  4210. oat_data.response_len = priv.response_len;
  4211. if (copy_to_user(udata, &oat_data,
  4212. sizeof(struct qeth_query_oat_data)))
  4213. rc = -EFAULT;
  4214. } else
  4215. if (rc == IPA_RC_FFFF)
  4216. rc = -EFAULT;
  4217. out_free:
  4218. vfree(priv.buffer);
  4219. out:
  4220. return rc;
  4221. }
  4222. static int qeth_query_card_info_cb(struct qeth_card *card,
  4223. struct qeth_reply *reply, unsigned long data)
  4224. {
  4225. struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
  4226. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4227. struct qeth_query_card_info *card_info;
  4228. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4229. if (qeth_setadpparms_inspect_rc(cmd))
  4230. return 0;
  4231. card_info = &cmd->data.setadapterparms.data.card_info;
  4232. carrier_info->card_type = card_info->card_type;
  4233. carrier_info->port_mode = card_info->port_mode;
  4234. carrier_info->port_speed = card_info->port_speed;
  4235. return 0;
  4236. }
  4237. static int qeth_query_card_info(struct qeth_card *card,
  4238. struct carrier_info *carrier_info)
  4239. {
  4240. struct qeth_cmd_buffer *iob;
  4241. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4242. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4243. return -EOPNOTSUPP;
  4244. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4245. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4246. if (!iob)
  4247. return -ENOMEM;
  4248. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4249. (void *)carrier_info);
  4250. }
  4251. /**
  4252. * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
  4253. * @card: pointer to a qeth_card
  4254. *
  4255. * Returns
  4256. * 0, if a MAC address has been set for the card's netdevice
  4257. * a return code, for various error conditions
  4258. */
  4259. int qeth_vm_request_mac(struct qeth_card *card)
  4260. {
  4261. struct diag26c_mac_resp *response;
  4262. struct diag26c_mac_req *request;
  4263. struct ccw_dev_id id;
  4264. int rc;
  4265. QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
  4266. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  4267. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  4268. if (!request || !response) {
  4269. rc = -ENOMEM;
  4270. goto out;
  4271. }
  4272. ccw_device_get_id(CARD_DDEV(card), &id);
  4273. request->resp_buf_len = sizeof(*response);
  4274. request->resp_version = DIAG26C_VERSION2;
  4275. request->op_code = DIAG26C_GET_MAC;
  4276. request->devno = id.devno;
  4277. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4278. rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
  4279. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4280. if (rc)
  4281. goto out;
  4282. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  4283. if (request->resp_buf_len < sizeof(*response) ||
  4284. response->version != request->resp_version) {
  4285. rc = -EIO;
  4286. QETH_DBF_TEXT(SETUP, 2, "badresp");
  4287. QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
  4288. sizeof(request->resp_buf_len));
  4289. } else if (!is_valid_ether_addr(response->mac)) {
  4290. rc = -EINVAL;
  4291. QETH_DBF_TEXT(SETUP, 2, "badmac");
  4292. QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
  4293. } else {
  4294. ether_addr_copy(card->dev->dev_addr, response->mac);
  4295. }
  4296. out:
  4297. kfree(response);
  4298. kfree(request);
  4299. return rc;
  4300. }
  4301. EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
  4302. static int qeth_get_qdio_q_format(struct qeth_card *card)
  4303. {
  4304. if (card->info.type == QETH_CARD_TYPE_IQD)
  4305. return QDIO_IQDIO_QFMT;
  4306. else
  4307. return QDIO_QETH_QFMT;
  4308. }
  4309. static void qeth_determine_capabilities(struct qeth_card *card)
  4310. {
  4311. int rc;
  4312. int length;
  4313. char *prcd;
  4314. struct ccw_device *ddev;
  4315. int ddev_offline = 0;
  4316. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4317. ddev = CARD_DDEV(card);
  4318. if (!ddev->online) {
  4319. ddev_offline = 1;
  4320. rc = ccw_device_set_online(ddev);
  4321. if (rc) {
  4322. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4323. goto out;
  4324. }
  4325. }
  4326. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4327. if (rc) {
  4328. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4329. dev_name(&card->gdev->dev), rc);
  4330. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4331. goto out_offline;
  4332. }
  4333. qeth_configure_unitaddr(card, prcd);
  4334. if (ddev_offline)
  4335. qeth_configure_blkt_default(card, prcd);
  4336. kfree(prcd);
  4337. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4338. if (rc)
  4339. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4340. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4341. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4342. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4343. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4344. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4345. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4346. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4347. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4348. dev_info(&card->gdev->dev,
  4349. "Completion Queueing supported\n");
  4350. } else {
  4351. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4352. }
  4353. out_offline:
  4354. if (ddev_offline == 1)
  4355. ccw_device_set_offline(ddev);
  4356. out:
  4357. return;
  4358. }
  4359. static void qeth_qdio_establish_cq(struct qeth_card *card,
  4360. struct qdio_buffer **in_sbal_ptrs,
  4361. void (**queue_start_poll)
  4362. (struct ccw_device *, int,
  4363. unsigned long))
  4364. {
  4365. int i;
  4366. if (card->options.cq == QETH_CQ_ENABLED) {
  4367. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4368. (card->qdio.no_in_queues - 1);
  4369. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; i++)
  4370. in_sbal_ptrs[offset + i] =
  4371. card->qdio.c_q->bufs[i].buffer;
  4372. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4373. }
  4374. }
  4375. static int qeth_qdio_establish(struct qeth_card *card)
  4376. {
  4377. struct qdio_initialize init_data;
  4378. char *qib_param_field;
  4379. struct qdio_buffer **in_sbal_ptrs;
  4380. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4381. struct qdio_buffer **out_sbal_ptrs;
  4382. int i, j, k;
  4383. int rc = 0;
  4384. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4385. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q,
  4386. GFP_KERNEL);
  4387. if (!qib_param_field) {
  4388. rc = -ENOMEM;
  4389. goto out_free_nothing;
  4390. }
  4391. qeth_create_qib_param_field(card, qib_param_field);
  4392. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4393. in_sbal_ptrs = kcalloc(card->qdio.no_in_queues * QDIO_MAX_BUFFERS_PER_Q,
  4394. sizeof(void *),
  4395. GFP_KERNEL);
  4396. if (!in_sbal_ptrs) {
  4397. rc = -ENOMEM;
  4398. goto out_free_qib_param;
  4399. }
  4400. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; i++)
  4401. in_sbal_ptrs[i] = card->qdio.in_q->bufs[i].buffer;
  4402. queue_start_poll = kcalloc(card->qdio.no_in_queues, sizeof(void *),
  4403. GFP_KERNEL);
  4404. if (!queue_start_poll) {
  4405. rc = -ENOMEM;
  4406. goto out_free_in_sbals;
  4407. }
  4408. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4409. queue_start_poll[i] = qeth_qdio_start_poll;
  4410. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4411. out_sbal_ptrs =
  4412. kcalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q,
  4413. sizeof(void *),
  4414. GFP_KERNEL);
  4415. if (!out_sbal_ptrs) {
  4416. rc = -ENOMEM;
  4417. goto out_free_queue_start_poll;
  4418. }
  4419. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4420. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++, k++)
  4421. out_sbal_ptrs[k] =
  4422. card->qdio.out_qs[i]->bufs[j]->buffer;
  4423. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4424. init_data.cdev = CARD_DDEV(card);
  4425. init_data.q_format = qeth_get_qdio_q_format(card);
  4426. init_data.qib_param_field_format = 0;
  4427. init_data.qib_param_field = qib_param_field;
  4428. init_data.no_input_qs = card->qdio.no_in_queues;
  4429. init_data.no_output_qs = card->qdio.no_out_queues;
  4430. init_data.input_handler = qeth_qdio_input_handler;
  4431. init_data.output_handler = qeth_qdio_output_handler;
  4432. init_data.queue_start_poll_array = queue_start_poll;
  4433. init_data.int_parm = (unsigned long) card;
  4434. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4435. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4436. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4437. init_data.scan_threshold =
  4438. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4439. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4440. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4441. rc = qdio_allocate(&init_data);
  4442. if (rc) {
  4443. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4444. goto out;
  4445. }
  4446. rc = qdio_establish(&init_data);
  4447. if (rc) {
  4448. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4449. qdio_free(CARD_DDEV(card));
  4450. }
  4451. }
  4452. switch (card->options.cq) {
  4453. case QETH_CQ_ENABLED:
  4454. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4455. break;
  4456. case QETH_CQ_DISABLED:
  4457. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4458. break;
  4459. default:
  4460. break;
  4461. }
  4462. out:
  4463. kfree(out_sbal_ptrs);
  4464. out_free_queue_start_poll:
  4465. kfree(queue_start_poll);
  4466. out_free_in_sbals:
  4467. kfree(in_sbal_ptrs);
  4468. out_free_qib_param:
  4469. kfree(qib_param_field);
  4470. out_free_nothing:
  4471. return rc;
  4472. }
  4473. static void qeth_core_free_card(struct qeth_card *card)
  4474. {
  4475. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4476. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4477. qeth_clean_channel(&card->read);
  4478. qeth_clean_channel(&card->write);
  4479. qeth_clean_channel(&card->data);
  4480. qeth_free_qdio_buffers(card);
  4481. unregister_service_level(&card->qeth_service_level);
  4482. kfree(card);
  4483. }
  4484. void qeth_trace_features(struct qeth_card *card)
  4485. {
  4486. QETH_CARD_TEXT(card, 2, "features");
  4487. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4488. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4489. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4490. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4491. sizeof(card->info.diagass_support));
  4492. }
  4493. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4494. static struct ccw_device_id qeth_ids[] = {
  4495. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4496. .driver_info = QETH_CARD_TYPE_OSD},
  4497. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4498. .driver_info = QETH_CARD_TYPE_IQD},
  4499. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4500. .driver_info = QETH_CARD_TYPE_OSN},
  4501. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4502. .driver_info = QETH_CARD_TYPE_OSM},
  4503. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4504. .driver_info = QETH_CARD_TYPE_OSX},
  4505. {},
  4506. };
  4507. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4508. static struct ccw_driver qeth_ccw_driver = {
  4509. .driver = {
  4510. .owner = THIS_MODULE,
  4511. .name = "qeth",
  4512. },
  4513. .ids = qeth_ids,
  4514. .probe = ccwgroup_probe_ccwdev,
  4515. .remove = ccwgroup_remove_ccwdev,
  4516. };
  4517. int qeth_core_hardsetup_card(struct qeth_card *card)
  4518. {
  4519. int retries = 3;
  4520. int rc;
  4521. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4522. atomic_set(&card->force_alloc_skb, 0);
  4523. rc = qeth_update_from_chp_desc(card);
  4524. if (rc)
  4525. return rc;
  4526. retry:
  4527. if (retries < 3)
  4528. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4529. dev_name(&card->gdev->dev));
  4530. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4531. ccw_device_set_offline(CARD_DDEV(card));
  4532. ccw_device_set_offline(CARD_WDEV(card));
  4533. ccw_device_set_offline(CARD_RDEV(card));
  4534. qdio_free(CARD_DDEV(card));
  4535. rc = ccw_device_set_online(CARD_RDEV(card));
  4536. if (rc)
  4537. goto retriable;
  4538. rc = ccw_device_set_online(CARD_WDEV(card));
  4539. if (rc)
  4540. goto retriable;
  4541. rc = ccw_device_set_online(CARD_DDEV(card));
  4542. if (rc)
  4543. goto retriable;
  4544. retriable:
  4545. if (rc == -ERESTARTSYS) {
  4546. QETH_DBF_TEXT(SETUP, 2, "break1");
  4547. return rc;
  4548. } else if (rc) {
  4549. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4550. if (--retries < 0)
  4551. goto out;
  4552. else
  4553. goto retry;
  4554. }
  4555. qeth_determine_capabilities(card);
  4556. qeth_init_tokens(card);
  4557. qeth_init_func_level(card);
  4558. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4559. if (rc == -ERESTARTSYS) {
  4560. QETH_DBF_TEXT(SETUP, 2, "break2");
  4561. return rc;
  4562. } else if (rc) {
  4563. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4564. if (--retries < 0)
  4565. goto out;
  4566. else
  4567. goto retry;
  4568. }
  4569. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4570. if (rc == -ERESTARTSYS) {
  4571. QETH_DBF_TEXT(SETUP, 2, "break3");
  4572. return rc;
  4573. } else if (rc) {
  4574. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4575. if (--retries < 0)
  4576. goto out;
  4577. else
  4578. goto retry;
  4579. }
  4580. card->read_or_write_problem = 0;
  4581. rc = qeth_mpc_initialize(card);
  4582. if (rc) {
  4583. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4584. goto out;
  4585. }
  4586. rc = qeth_send_startlan(card);
  4587. if (rc) {
  4588. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4589. if (rc == IPA_RC_LAN_OFFLINE) {
  4590. dev_warn(&card->gdev->dev,
  4591. "The LAN is offline\n");
  4592. card->lan_online = 0;
  4593. } else {
  4594. rc = -ENODEV;
  4595. goto out;
  4596. }
  4597. } else
  4598. card->lan_online = 1;
  4599. card->options.ipa4.supported_funcs = 0;
  4600. card->options.ipa6.supported_funcs = 0;
  4601. card->options.adp.supported_funcs = 0;
  4602. card->options.sbp.supported_funcs = 0;
  4603. card->info.diagass_support = 0;
  4604. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4605. if (rc == -ENOMEM)
  4606. goto out;
  4607. if (qeth_is_supported(card, IPA_IPV6)) {
  4608. rc = qeth_query_ipassists(card, QETH_PROT_IPV6);
  4609. if (rc == -ENOMEM)
  4610. goto out;
  4611. }
  4612. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4613. rc = qeth_query_setadapterparms(card);
  4614. if (rc < 0) {
  4615. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4616. goto out;
  4617. }
  4618. }
  4619. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4620. rc = qeth_query_setdiagass(card);
  4621. if (rc < 0) {
  4622. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4623. goto out;
  4624. }
  4625. }
  4626. return 0;
  4627. out:
  4628. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4629. "an error on the device\n");
  4630. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4631. dev_name(&card->gdev->dev), rc);
  4632. return rc;
  4633. }
  4634. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4635. static void qeth_create_skb_frag(struct qdio_buffer_element *element,
  4636. struct sk_buff *skb, int offset, int data_len)
  4637. {
  4638. struct page *page = virt_to_page(element->addr);
  4639. unsigned int next_frag;
  4640. /* first fill the linear space */
  4641. if (!skb->len) {
  4642. unsigned int linear = min(data_len, skb_tailroom(skb));
  4643. skb_put_data(skb, element->addr + offset, linear);
  4644. data_len -= linear;
  4645. if (!data_len)
  4646. return;
  4647. offset += linear;
  4648. /* fall through to add page frag for remaining data */
  4649. }
  4650. next_frag = skb_shinfo(skb)->nr_frags;
  4651. get_page(page);
  4652. skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
  4653. }
  4654. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4655. {
  4656. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4657. }
  4658. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4659. struct qeth_qdio_buffer *qethbuffer,
  4660. struct qdio_buffer_element **__element, int *__offset,
  4661. struct qeth_hdr **hdr)
  4662. {
  4663. struct qdio_buffer_element *element = *__element;
  4664. struct qdio_buffer *buffer = qethbuffer->buffer;
  4665. int offset = *__offset;
  4666. struct sk_buff *skb;
  4667. int skb_len = 0;
  4668. void *data_ptr;
  4669. int data_len;
  4670. int headroom = 0;
  4671. int use_rx_sg = 0;
  4672. /* qeth_hdr must not cross element boundaries */
  4673. while (element->length < offset + sizeof(struct qeth_hdr)) {
  4674. if (qeth_is_last_sbale(element))
  4675. return NULL;
  4676. element++;
  4677. offset = 0;
  4678. }
  4679. *hdr = element->addr + offset;
  4680. offset += sizeof(struct qeth_hdr);
  4681. switch ((*hdr)->hdr.l2.id) {
  4682. case QETH_HEADER_TYPE_LAYER2:
  4683. skb_len = (*hdr)->hdr.l2.pkt_length;
  4684. break;
  4685. case QETH_HEADER_TYPE_LAYER3:
  4686. skb_len = (*hdr)->hdr.l3.length;
  4687. headroom = ETH_HLEN;
  4688. break;
  4689. case QETH_HEADER_TYPE_OSN:
  4690. skb_len = (*hdr)->hdr.osn.pdu_length;
  4691. headroom = sizeof(struct qeth_hdr);
  4692. break;
  4693. default:
  4694. break;
  4695. }
  4696. if (!skb_len)
  4697. return NULL;
  4698. if (((skb_len >= card->options.rx_sg_cb) &&
  4699. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4700. (!atomic_read(&card->force_alloc_skb))) ||
  4701. (card->options.cq == QETH_CQ_ENABLED))
  4702. use_rx_sg = 1;
  4703. if (use_rx_sg && qethbuffer->rx_skb) {
  4704. /* QETH_CQ_ENABLED only: */
  4705. skb = qethbuffer->rx_skb;
  4706. qethbuffer->rx_skb = NULL;
  4707. } else {
  4708. unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
  4709. skb = napi_alloc_skb(&card->napi, linear + headroom);
  4710. }
  4711. if (!skb)
  4712. goto no_mem;
  4713. if (headroom)
  4714. skb_reserve(skb, headroom);
  4715. data_ptr = element->addr + offset;
  4716. while (skb_len) {
  4717. data_len = min(skb_len, (int)(element->length - offset));
  4718. if (data_len) {
  4719. if (use_rx_sg)
  4720. qeth_create_skb_frag(element, skb, offset,
  4721. data_len);
  4722. else
  4723. skb_put_data(skb, data_ptr, data_len);
  4724. }
  4725. skb_len -= data_len;
  4726. if (skb_len) {
  4727. if (qeth_is_last_sbale(element)) {
  4728. QETH_CARD_TEXT(card, 4, "unexeob");
  4729. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4730. dev_kfree_skb_any(skb);
  4731. card->stats.rx_errors++;
  4732. return NULL;
  4733. }
  4734. element++;
  4735. offset = 0;
  4736. data_ptr = element->addr;
  4737. } else {
  4738. offset += data_len;
  4739. }
  4740. }
  4741. *__element = element;
  4742. *__offset = offset;
  4743. if (use_rx_sg && card->options.performance_stats) {
  4744. card->perf_stats.sg_skbs_rx++;
  4745. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4746. }
  4747. return skb;
  4748. no_mem:
  4749. if (net_ratelimit()) {
  4750. QETH_CARD_TEXT(card, 2, "noskbmem");
  4751. }
  4752. card->stats.rx_dropped++;
  4753. return NULL;
  4754. }
  4755. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4756. int qeth_poll(struct napi_struct *napi, int budget)
  4757. {
  4758. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4759. int work_done = 0;
  4760. struct qeth_qdio_buffer *buffer;
  4761. int done;
  4762. int new_budget = budget;
  4763. if (card->options.performance_stats) {
  4764. card->perf_stats.inbound_cnt++;
  4765. card->perf_stats.inbound_start_time = qeth_get_micros();
  4766. }
  4767. while (1) {
  4768. if (!card->rx.b_count) {
  4769. card->rx.qdio_err = 0;
  4770. card->rx.b_count = qdio_get_next_buffers(
  4771. card->data.ccwdev, 0, &card->rx.b_index,
  4772. &card->rx.qdio_err);
  4773. if (card->rx.b_count <= 0) {
  4774. card->rx.b_count = 0;
  4775. break;
  4776. }
  4777. card->rx.b_element =
  4778. &card->qdio.in_q->bufs[card->rx.b_index]
  4779. .buffer->element[0];
  4780. card->rx.e_offset = 0;
  4781. }
  4782. while (card->rx.b_count) {
  4783. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4784. if (!(card->rx.qdio_err &&
  4785. qeth_check_qdio_errors(card, buffer->buffer,
  4786. card->rx.qdio_err, "qinerr")))
  4787. work_done +=
  4788. card->discipline->process_rx_buffer(
  4789. card, new_budget, &done);
  4790. else
  4791. done = 1;
  4792. if (done) {
  4793. if (card->options.performance_stats)
  4794. card->perf_stats.bufs_rec++;
  4795. qeth_put_buffer_pool_entry(card,
  4796. buffer->pool_entry);
  4797. qeth_queue_input_buffer(card, card->rx.b_index);
  4798. card->rx.b_count--;
  4799. if (card->rx.b_count) {
  4800. card->rx.b_index =
  4801. (card->rx.b_index + 1) %
  4802. QDIO_MAX_BUFFERS_PER_Q;
  4803. card->rx.b_element =
  4804. &card->qdio.in_q
  4805. ->bufs[card->rx.b_index]
  4806. .buffer->element[0];
  4807. card->rx.e_offset = 0;
  4808. }
  4809. }
  4810. if (work_done >= budget)
  4811. goto out;
  4812. else
  4813. new_budget = budget - work_done;
  4814. }
  4815. }
  4816. napi_complete_done(napi, work_done);
  4817. if (qdio_start_irq(card->data.ccwdev, 0))
  4818. napi_schedule(&card->napi);
  4819. out:
  4820. if (card->options.performance_stats)
  4821. card->perf_stats.inbound_time += qeth_get_micros() -
  4822. card->perf_stats.inbound_start_time;
  4823. return work_done;
  4824. }
  4825. EXPORT_SYMBOL_GPL(qeth_poll);
  4826. static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  4827. {
  4828. if (!cmd->hdr.return_code)
  4829. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4830. return cmd->hdr.return_code;
  4831. }
  4832. int qeth_setassparms_cb(struct qeth_card *card,
  4833. struct qeth_reply *reply, unsigned long data)
  4834. {
  4835. struct qeth_ipa_cmd *cmd;
  4836. QETH_CARD_TEXT(card, 4, "defadpcb");
  4837. cmd = (struct qeth_ipa_cmd *) data;
  4838. if (cmd->hdr.return_code == 0) {
  4839. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4840. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4841. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4842. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4843. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4844. }
  4845. return 0;
  4846. }
  4847. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4848. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4849. enum qeth_ipa_funcs ipa_func,
  4850. __u16 cmd_code, __u16 len,
  4851. enum qeth_prot_versions prot)
  4852. {
  4853. struct qeth_cmd_buffer *iob;
  4854. struct qeth_ipa_cmd *cmd;
  4855. QETH_CARD_TEXT(card, 4, "getasscm");
  4856. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4857. if (iob) {
  4858. cmd = __ipa_cmd(iob);
  4859. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4860. cmd->data.setassparms.hdr.length = 8 + len;
  4861. cmd->data.setassparms.hdr.command_code = cmd_code;
  4862. cmd->data.setassparms.hdr.return_code = 0;
  4863. cmd->data.setassparms.hdr.seq_no = 0;
  4864. }
  4865. return iob;
  4866. }
  4867. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4868. int qeth_send_setassparms(struct qeth_card *card,
  4869. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4870. int (*reply_cb)(struct qeth_card *,
  4871. struct qeth_reply *, unsigned long),
  4872. void *reply_param)
  4873. {
  4874. int rc;
  4875. struct qeth_ipa_cmd *cmd;
  4876. QETH_CARD_TEXT(card, 4, "sendassp");
  4877. cmd = __ipa_cmd(iob);
  4878. if (len <= sizeof(__u32))
  4879. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4880. else /* (len > sizeof(__u32)) */
  4881. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4882. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4883. return rc;
  4884. }
  4885. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4886. int qeth_send_simple_setassparms_prot(struct qeth_card *card,
  4887. enum qeth_ipa_funcs ipa_func,
  4888. u16 cmd_code, long data,
  4889. enum qeth_prot_versions prot)
  4890. {
  4891. int rc;
  4892. int length = 0;
  4893. struct qeth_cmd_buffer *iob;
  4894. QETH_CARD_TEXT_(card, 4, "simassp%i", prot);
  4895. if (data)
  4896. length = sizeof(__u32);
  4897. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, length, prot);
  4898. if (!iob)
  4899. return -ENOMEM;
  4900. rc = qeth_send_setassparms(card, iob, length, data,
  4901. qeth_setassparms_cb, NULL);
  4902. return rc;
  4903. }
  4904. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms_prot);
  4905. static void qeth_unregister_dbf_views(void)
  4906. {
  4907. int x;
  4908. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4909. debug_unregister(qeth_dbf[x].id);
  4910. qeth_dbf[x].id = NULL;
  4911. }
  4912. }
  4913. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4914. {
  4915. char dbf_txt_buf[32];
  4916. va_list args;
  4917. if (!debug_level_enabled(id, level))
  4918. return;
  4919. va_start(args, fmt);
  4920. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4921. va_end(args);
  4922. debug_text_event(id, level, dbf_txt_buf);
  4923. }
  4924. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4925. static int qeth_register_dbf_views(void)
  4926. {
  4927. int ret;
  4928. int x;
  4929. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4930. /* register the areas */
  4931. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4932. qeth_dbf[x].pages,
  4933. qeth_dbf[x].areas,
  4934. qeth_dbf[x].len);
  4935. if (qeth_dbf[x].id == NULL) {
  4936. qeth_unregister_dbf_views();
  4937. return -ENOMEM;
  4938. }
  4939. /* register a view */
  4940. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4941. if (ret) {
  4942. qeth_unregister_dbf_views();
  4943. return ret;
  4944. }
  4945. /* set a passing level */
  4946. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4947. }
  4948. return 0;
  4949. }
  4950. int qeth_core_load_discipline(struct qeth_card *card,
  4951. enum qeth_discipline_id discipline)
  4952. {
  4953. int rc = 0;
  4954. mutex_lock(&qeth_mod_mutex);
  4955. switch (discipline) {
  4956. case QETH_DISCIPLINE_LAYER3:
  4957. card->discipline = try_then_request_module(
  4958. symbol_get(qeth_l3_discipline), "qeth_l3");
  4959. break;
  4960. case QETH_DISCIPLINE_LAYER2:
  4961. card->discipline = try_then_request_module(
  4962. symbol_get(qeth_l2_discipline), "qeth_l2");
  4963. break;
  4964. default:
  4965. break;
  4966. }
  4967. if (!card->discipline) {
  4968. dev_err(&card->gdev->dev, "There is no kernel module to "
  4969. "support discipline %d\n", discipline);
  4970. rc = -EINVAL;
  4971. }
  4972. mutex_unlock(&qeth_mod_mutex);
  4973. return rc;
  4974. }
  4975. void qeth_core_free_discipline(struct qeth_card *card)
  4976. {
  4977. if (card->options.layer2)
  4978. symbol_put(qeth_l2_discipline);
  4979. else
  4980. symbol_put(qeth_l3_discipline);
  4981. card->discipline = NULL;
  4982. }
  4983. const struct device_type qeth_generic_devtype = {
  4984. .name = "qeth_generic",
  4985. .groups = qeth_generic_attr_groups,
  4986. };
  4987. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  4988. static const struct device_type qeth_osn_devtype = {
  4989. .name = "qeth_osn",
  4990. .groups = qeth_osn_attr_groups,
  4991. };
  4992. #define DBF_NAME_LEN 20
  4993. struct qeth_dbf_entry {
  4994. char dbf_name[DBF_NAME_LEN];
  4995. debug_info_t *dbf_info;
  4996. struct list_head dbf_list;
  4997. };
  4998. static LIST_HEAD(qeth_dbf_list);
  4999. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  5000. static debug_info_t *qeth_get_dbf_entry(char *name)
  5001. {
  5002. struct qeth_dbf_entry *entry;
  5003. debug_info_t *rc = NULL;
  5004. mutex_lock(&qeth_dbf_list_mutex);
  5005. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  5006. if (strcmp(entry->dbf_name, name) == 0) {
  5007. rc = entry->dbf_info;
  5008. break;
  5009. }
  5010. }
  5011. mutex_unlock(&qeth_dbf_list_mutex);
  5012. return rc;
  5013. }
  5014. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  5015. {
  5016. struct qeth_dbf_entry *new_entry;
  5017. card->debug = debug_register(name, 2, 1, 8);
  5018. if (!card->debug) {
  5019. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  5020. goto err;
  5021. }
  5022. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  5023. goto err_dbg;
  5024. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  5025. if (!new_entry)
  5026. goto err_dbg;
  5027. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  5028. new_entry->dbf_info = card->debug;
  5029. mutex_lock(&qeth_dbf_list_mutex);
  5030. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  5031. mutex_unlock(&qeth_dbf_list_mutex);
  5032. return 0;
  5033. err_dbg:
  5034. debug_unregister(card->debug);
  5035. err:
  5036. return -ENOMEM;
  5037. }
  5038. static void qeth_clear_dbf_list(void)
  5039. {
  5040. struct qeth_dbf_entry *entry, *tmp;
  5041. mutex_lock(&qeth_dbf_list_mutex);
  5042. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5043. list_del(&entry->dbf_list);
  5044. debug_unregister(entry->dbf_info);
  5045. kfree(entry);
  5046. }
  5047. mutex_unlock(&qeth_dbf_list_mutex);
  5048. }
  5049. static struct net_device *qeth_alloc_netdev(struct qeth_card *card)
  5050. {
  5051. struct net_device *dev;
  5052. switch (card->info.type) {
  5053. case QETH_CARD_TYPE_IQD:
  5054. dev = alloc_netdev(0, "hsi%d", NET_NAME_UNKNOWN, ether_setup);
  5055. break;
  5056. case QETH_CARD_TYPE_OSN:
  5057. dev = alloc_netdev(0, "osn%d", NET_NAME_UNKNOWN, ether_setup);
  5058. break;
  5059. default:
  5060. dev = alloc_etherdev(0);
  5061. }
  5062. if (!dev)
  5063. return NULL;
  5064. dev->ml_priv = card;
  5065. dev->watchdog_timeo = QETH_TX_TIMEOUT;
  5066. dev->min_mtu = IS_OSN(card) ? 64 : 576;
  5067. /* initialized when device first goes online: */
  5068. dev->max_mtu = 0;
  5069. dev->mtu = 0;
  5070. SET_NETDEV_DEV(dev, &card->gdev->dev);
  5071. netif_carrier_off(dev);
  5072. if (!IS_OSN(card)) {
  5073. dev->priv_flags &= ~IFF_TX_SKB_SHARING;
  5074. dev->hw_features |= NETIF_F_SG;
  5075. dev->vlan_features |= NETIF_F_SG;
  5076. if (IS_IQD(card))
  5077. dev->features |= NETIF_F_SG;
  5078. }
  5079. return dev;
  5080. }
  5081. struct net_device *qeth_clone_netdev(struct net_device *orig)
  5082. {
  5083. struct net_device *clone = qeth_alloc_netdev(orig->ml_priv);
  5084. if (!clone)
  5085. return NULL;
  5086. clone->dev_port = orig->dev_port;
  5087. return clone;
  5088. }
  5089. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5090. {
  5091. struct qeth_card *card;
  5092. struct device *dev;
  5093. int rc;
  5094. enum qeth_discipline_id enforced_disc;
  5095. unsigned long flags;
  5096. char dbf_name[DBF_NAME_LEN];
  5097. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5098. dev = &gdev->dev;
  5099. if (!get_device(dev))
  5100. return -ENODEV;
  5101. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5102. card = qeth_alloc_card(gdev);
  5103. if (!card) {
  5104. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5105. rc = -ENOMEM;
  5106. goto err_dev;
  5107. }
  5108. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5109. dev_name(&gdev->dev));
  5110. card->debug = qeth_get_dbf_entry(dbf_name);
  5111. if (!card->debug) {
  5112. rc = qeth_add_dbf_entry(card, dbf_name);
  5113. if (rc)
  5114. goto err_card;
  5115. }
  5116. dev_set_drvdata(&gdev->dev, card);
  5117. qeth_setup_card(card);
  5118. rc = qeth_update_from_chp_desc(card);
  5119. if (rc)
  5120. goto err_chp_desc;
  5121. card->dev = qeth_alloc_netdev(card);
  5122. if (!card->dev) {
  5123. rc = -ENOMEM;
  5124. goto err_card;
  5125. }
  5126. qeth_determine_capabilities(card);
  5127. enforced_disc = qeth_enforce_discipline(card);
  5128. switch (enforced_disc) {
  5129. case QETH_DISCIPLINE_UNDETERMINED:
  5130. gdev->dev.type = &qeth_generic_devtype;
  5131. break;
  5132. default:
  5133. card->info.layer_enforced = true;
  5134. rc = qeth_core_load_discipline(card, enforced_disc);
  5135. if (rc)
  5136. goto err_load;
  5137. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5138. ? card->discipline->devtype
  5139. : &qeth_osn_devtype;
  5140. rc = card->discipline->setup(card->gdev);
  5141. if (rc)
  5142. goto err_disc;
  5143. break;
  5144. }
  5145. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5146. list_add_tail(&card->list, &qeth_core_card_list.list);
  5147. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5148. return 0;
  5149. err_disc:
  5150. qeth_core_free_discipline(card);
  5151. err_load:
  5152. free_netdev(card->dev);
  5153. err_chp_desc:
  5154. err_card:
  5155. qeth_core_free_card(card);
  5156. err_dev:
  5157. put_device(dev);
  5158. return rc;
  5159. }
  5160. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5161. {
  5162. unsigned long flags;
  5163. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5164. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5165. if (card->discipline) {
  5166. card->discipline->remove(gdev);
  5167. qeth_core_free_discipline(card);
  5168. }
  5169. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5170. list_del(&card->list);
  5171. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5172. free_netdev(card->dev);
  5173. qeth_core_free_card(card);
  5174. dev_set_drvdata(&gdev->dev, NULL);
  5175. put_device(&gdev->dev);
  5176. }
  5177. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5178. {
  5179. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5180. int rc = 0;
  5181. enum qeth_discipline_id def_discipline;
  5182. if (!card->discipline) {
  5183. if (card->info.type == QETH_CARD_TYPE_IQD)
  5184. def_discipline = QETH_DISCIPLINE_LAYER3;
  5185. else
  5186. def_discipline = QETH_DISCIPLINE_LAYER2;
  5187. rc = qeth_core_load_discipline(card, def_discipline);
  5188. if (rc)
  5189. goto err;
  5190. rc = card->discipline->setup(card->gdev);
  5191. if (rc) {
  5192. qeth_core_free_discipline(card);
  5193. goto err;
  5194. }
  5195. }
  5196. rc = card->discipline->set_online(gdev);
  5197. err:
  5198. return rc;
  5199. }
  5200. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5201. {
  5202. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5203. return card->discipline->set_offline(gdev);
  5204. }
  5205. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5206. {
  5207. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5208. qeth_set_allowed_threads(card, 0, 1);
  5209. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5210. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5211. qeth_qdio_clear_card(card, 0);
  5212. qeth_clear_qdio_buffers(card);
  5213. qdio_free(CARD_DDEV(card));
  5214. }
  5215. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5216. {
  5217. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5218. if (card->discipline && card->discipline->freeze)
  5219. return card->discipline->freeze(gdev);
  5220. return 0;
  5221. }
  5222. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5223. {
  5224. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5225. if (card->discipline && card->discipline->thaw)
  5226. return card->discipline->thaw(gdev);
  5227. return 0;
  5228. }
  5229. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5230. {
  5231. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5232. if (card->discipline && card->discipline->restore)
  5233. return card->discipline->restore(gdev);
  5234. return 0;
  5235. }
  5236. static ssize_t group_store(struct device_driver *ddrv, const char *buf,
  5237. size_t count)
  5238. {
  5239. int err;
  5240. err = ccwgroup_create_dev(qeth_core_root_dev, to_ccwgroupdrv(ddrv), 3,
  5241. buf);
  5242. return err ? err : count;
  5243. }
  5244. static DRIVER_ATTR_WO(group);
  5245. static struct attribute *qeth_drv_attrs[] = {
  5246. &driver_attr_group.attr,
  5247. NULL,
  5248. };
  5249. static struct attribute_group qeth_drv_attr_group = {
  5250. .attrs = qeth_drv_attrs,
  5251. };
  5252. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5253. &qeth_drv_attr_group,
  5254. NULL,
  5255. };
  5256. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5257. .driver = {
  5258. .groups = qeth_drv_attr_groups,
  5259. .owner = THIS_MODULE,
  5260. .name = "qeth",
  5261. },
  5262. .ccw_driver = &qeth_ccw_driver,
  5263. .setup = qeth_core_probe_device,
  5264. .remove = qeth_core_remove_device,
  5265. .set_online = qeth_core_set_online,
  5266. .set_offline = qeth_core_set_offline,
  5267. .shutdown = qeth_core_shutdown,
  5268. .prepare = NULL,
  5269. .complete = NULL,
  5270. .freeze = qeth_core_freeze,
  5271. .thaw = qeth_core_thaw,
  5272. .restore = qeth_core_restore,
  5273. };
  5274. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5275. {
  5276. struct qeth_card *card = dev->ml_priv;
  5277. struct mii_ioctl_data *mii_data;
  5278. int rc = 0;
  5279. if (!card)
  5280. return -ENODEV;
  5281. if (!qeth_card_hw_is_reachable(card))
  5282. return -ENODEV;
  5283. if (card->info.type == QETH_CARD_TYPE_OSN)
  5284. return -EPERM;
  5285. switch (cmd) {
  5286. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5287. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5288. break;
  5289. case SIOC_QETH_GET_CARD_TYPE:
  5290. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5291. card->info.type == QETH_CARD_TYPE_OSM ||
  5292. card->info.type == QETH_CARD_TYPE_OSX) &&
  5293. !card->info.guestlan)
  5294. return 1;
  5295. else
  5296. return 0;
  5297. case SIOCGMIIPHY:
  5298. mii_data = if_mii(rq);
  5299. mii_data->phy_id = 0;
  5300. break;
  5301. case SIOCGMIIREG:
  5302. mii_data = if_mii(rq);
  5303. if (mii_data->phy_id != 0)
  5304. rc = -EINVAL;
  5305. else
  5306. mii_data->val_out = qeth_mdio_read(dev,
  5307. mii_data->phy_id, mii_data->reg_num);
  5308. break;
  5309. case SIOC_QETH_QUERY_OAT:
  5310. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5311. break;
  5312. default:
  5313. if (card->discipline->do_ioctl)
  5314. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5315. else
  5316. rc = -EOPNOTSUPP;
  5317. }
  5318. if (rc)
  5319. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5320. return rc;
  5321. }
  5322. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5323. static struct {
  5324. const char str[ETH_GSTRING_LEN];
  5325. } qeth_ethtool_stats_keys[] = {
  5326. /* 0 */{"rx skbs"},
  5327. {"rx buffers"},
  5328. {"tx skbs"},
  5329. {"tx buffers"},
  5330. {"tx skbs no packing"},
  5331. {"tx buffers no packing"},
  5332. {"tx skbs packing"},
  5333. {"tx buffers packing"},
  5334. {"tx sg skbs"},
  5335. {"tx buffer elements"},
  5336. /* 10 */{"rx sg skbs"},
  5337. {"rx sg frags"},
  5338. {"rx sg page allocs"},
  5339. {"tx large kbytes"},
  5340. {"tx large count"},
  5341. {"tx pk state ch n->p"},
  5342. {"tx pk state ch p->n"},
  5343. {"tx pk watermark low"},
  5344. {"tx pk watermark high"},
  5345. {"queue 0 buffer usage"},
  5346. /* 20 */{"queue 1 buffer usage"},
  5347. {"queue 2 buffer usage"},
  5348. {"queue 3 buffer usage"},
  5349. {"rx poll time"},
  5350. {"rx poll count"},
  5351. {"rx do_QDIO time"},
  5352. {"rx do_QDIO count"},
  5353. {"tx handler time"},
  5354. {"tx handler count"},
  5355. {"tx time"},
  5356. /* 30 */{"tx count"},
  5357. {"tx do_QDIO time"},
  5358. {"tx do_QDIO count"},
  5359. {"tx csum"},
  5360. {"tx lin"},
  5361. {"tx linfail"},
  5362. {"cq handler count"},
  5363. {"cq handler time"},
  5364. {"rx csum"}
  5365. };
  5366. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5367. {
  5368. switch (stringset) {
  5369. case ETH_SS_STATS:
  5370. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5371. default:
  5372. return -EINVAL;
  5373. }
  5374. }
  5375. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5376. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5377. struct ethtool_stats *stats, u64 *data)
  5378. {
  5379. struct qeth_card *card = dev->ml_priv;
  5380. data[0] = card->stats.rx_packets -
  5381. card->perf_stats.initial_rx_packets;
  5382. data[1] = card->perf_stats.bufs_rec;
  5383. data[2] = card->stats.tx_packets -
  5384. card->perf_stats.initial_tx_packets;
  5385. data[3] = card->perf_stats.bufs_sent;
  5386. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5387. - card->perf_stats.skbs_sent_pack;
  5388. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5389. data[6] = card->perf_stats.skbs_sent_pack;
  5390. data[7] = card->perf_stats.bufs_sent_pack;
  5391. data[8] = card->perf_stats.sg_skbs_sent;
  5392. data[9] = card->perf_stats.buf_elements_sent;
  5393. data[10] = card->perf_stats.sg_skbs_rx;
  5394. data[11] = card->perf_stats.sg_frags_rx;
  5395. data[12] = card->perf_stats.sg_alloc_page_rx;
  5396. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5397. data[14] = card->perf_stats.large_send_cnt;
  5398. data[15] = card->perf_stats.sc_dp_p;
  5399. data[16] = card->perf_stats.sc_p_dp;
  5400. data[17] = QETH_LOW_WATERMARK_PACK;
  5401. data[18] = QETH_HIGH_WATERMARK_PACK;
  5402. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5403. data[20] = (card->qdio.no_out_queues > 1) ?
  5404. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5405. data[21] = (card->qdio.no_out_queues > 2) ?
  5406. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5407. data[22] = (card->qdio.no_out_queues > 3) ?
  5408. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5409. data[23] = card->perf_stats.inbound_time;
  5410. data[24] = card->perf_stats.inbound_cnt;
  5411. data[25] = card->perf_stats.inbound_do_qdio_time;
  5412. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5413. data[27] = card->perf_stats.outbound_handler_time;
  5414. data[28] = card->perf_stats.outbound_handler_cnt;
  5415. data[29] = card->perf_stats.outbound_time;
  5416. data[30] = card->perf_stats.outbound_cnt;
  5417. data[31] = card->perf_stats.outbound_do_qdio_time;
  5418. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5419. data[33] = card->perf_stats.tx_csum;
  5420. data[34] = card->perf_stats.tx_lin;
  5421. data[35] = card->perf_stats.tx_linfail;
  5422. data[36] = card->perf_stats.cq_cnt;
  5423. data[37] = card->perf_stats.cq_time;
  5424. data[38] = card->perf_stats.rx_csum;
  5425. }
  5426. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5427. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5428. {
  5429. switch (stringset) {
  5430. case ETH_SS_STATS:
  5431. memcpy(data, &qeth_ethtool_stats_keys,
  5432. sizeof(qeth_ethtool_stats_keys));
  5433. break;
  5434. default:
  5435. WARN_ON(1);
  5436. break;
  5437. }
  5438. }
  5439. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5440. void qeth_core_get_drvinfo(struct net_device *dev,
  5441. struct ethtool_drvinfo *info)
  5442. {
  5443. struct qeth_card *card = dev->ml_priv;
  5444. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5445. sizeof(info->driver));
  5446. strlcpy(info->version, "1.0", sizeof(info->version));
  5447. strlcpy(info->fw_version, card->info.mcl_level,
  5448. sizeof(info->fw_version));
  5449. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5450. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5451. }
  5452. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5453. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5454. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5455. /* Always advertise and support all speeds up to specified, and only one */
  5456. /* specified port type. */
  5457. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5458. int maxspeed, int porttype)
  5459. {
  5460. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5461. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5462. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5463. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5464. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5465. switch (porttype) {
  5466. case PORT_TP:
  5467. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5468. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5469. break;
  5470. case PORT_FIBRE:
  5471. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5472. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5473. break;
  5474. default:
  5475. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5476. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5477. WARN_ON_ONCE(1);
  5478. }
  5479. /* fallthrough from high to low, to select all legal speeds: */
  5480. switch (maxspeed) {
  5481. case SPEED_10000:
  5482. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5483. 10000baseT_Full);
  5484. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5485. 10000baseT_Full);
  5486. case SPEED_1000:
  5487. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5488. 1000baseT_Full);
  5489. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5490. 1000baseT_Full);
  5491. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5492. 1000baseT_Half);
  5493. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5494. 1000baseT_Half);
  5495. case SPEED_100:
  5496. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5497. 100baseT_Full);
  5498. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5499. 100baseT_Full);
  5500. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5501. 100baseT_Half);
  5502. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5503. 100baseT_Half);
  5504. case SPEED_10:
  5505. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5506. 10baseT_Full);
  5507. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5508. 10baseT_Full);
  5509. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5510. 10baseT_Half);
  5511. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5512. 10baseT_Half);
  5513. /* end fallthrough */
  5514. break;
  5515. default:
  5516. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5517. 10baseT_Full);
  5518. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5519. 10baseT_Full);
  5520. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5521. 10baseT_Half);
  5522. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5523. 10baseT_Half);
  5524. WARN_ON_ONCE(1);
  5525. }
  5526. }
  5527. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5528. struct ethtool_link_ksettings *cmd)
  5529. {
  5530. struct qeth_card *card = netdev->ml_priv;
  5531. enum qeth_link_types link_type;
  5532. struct carrier_info carrier_info;
  5533. int rc;
  5534. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5535. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5536. else
  5537. link_type = card->info.link_type;
  5538. cmd->base.duplex = DUPLEX_FULL;
  5539. cmd->base.autoneg = AUTONEG_ENABLE;
  5540. cmd->base.phy_address = 0;
  5541. cmd->base.mdio_support = 0;
  5542. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5543. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5544. switch (link_type) {
  5545. case QETH_LINK_TYPE_FAST_ETH:
  5546. case QETH_LINK_TYPE_LANE_ETH100:
  5547. cmd->base.speed = SPEED_100;
  5548. cmd->base.port = PORT_TP;
  5549. break;
  5550. case QETH_LINK_TYPE_GBIT_ETH:
  5551. case QETH_LINK_TYPE_LANE_ETH1000:
  5552. cmd->base.speed = SPEED_1000;
  5553. cmd->base.port = PORT_FIBRE;
  5554. break;
  5555. case QETH_LINK_TYPE_10GBIT_ETH:
  5556. cmd->base.speed = SPEED_10000;
  5557. cmd->base.port = PORT_FIBRE;
  5558. break;
  5559. default:
  5560. cmd->base.speed = SPEED_10;
  5561. cmd->base.port = PORT_TP;
  5562. }
  5563. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5564. /* Check if we can obtain more accurate information. */
  5565. /* If QUERY_CARD_INFO command is not supported or fails, */
  5566. /* just return the heuristics that was filled above. */
  5567. if (!qeth_card_hw_is_reachable(card))
  5568. return -ENODEV;
  5569. rc = qeth_query_card_info(card, &carrier_info);
  5570. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5571. return 0;
  5572. if (rc) /* report error from the hardware operation */
  5573. return rc;
  5574. /* on success, fill in the information got from the hardware */
  5575. netdev_dbg(netdev,
  5576. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5577. carrier_info.card_type,
  5578. carrier_info.port_mode,
  5579. carrier_info.port_speed);
  5580. /* Update attributes for which we've obtained more authoritative */
  5581. /* information, leave the rest the way they where filled above. */
  5582. switch (carrier_info.card_type) {
  5583. case CARD_INFO_TYPE_1G_COPPER_A:
  5584. case CARD_INFO_TYPE_1G_COPPER_B:
  5585. cmd->base.port = PORT_TP;
  5586. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5587. break;
  5588. case CARD_INFO_TYPE_1G_FIBRE_A:
  5589. case CARD_INFO_TYPE_1G_FIBRE_B:
  5590. cmd->base.port = PORT_FIBRE;
  5591. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5592. break;
  5593. case CARD_INFO_TYPE_10G_FIBRE_A:
  5594. case CARD_INFO_TYPE_10G_FIBRE_B:
  5595. cmd->base.port = PORT_FIBRE;
  5596. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5597. break;
  5598. }
  5599. switch (carrier_info.port_mode) {
  5600. case CARD_INFO_PORTM_FULLDUPLEX:
  5601. cmd->base.duplex = DUPLEX_FULL;
  5602. break;
  5603. case CARD_INFO_PORTM_HALFDUPLEX:
  5604. cmd->base.duplex = DUPLEX_HALF;
  5605. break;
  5606. }
  5607. switch (carrier_info.port_speed) {
  5608. case CARD_INFO_PORTS_10M:
  5609. cmd->base.speed = SPEED_10;
  5610. break;
  5611. case CARD_INFO_PORTS_100M:
  5612. cmd->base.speed = SPEED_100;
  5613. break;
  5614. case CARD_INFO_PORTS_1G:
  5615. cmd->base.speed = SPEED_1000;
  5616. break;
  5617. case CARD_INFO_PORTS_10G:
  5618. cmd->base.speed = SPEED_10000;
  5619. break;
  5620. }
  5621. return 0;
  5622. }
  5623. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5624. /* Callback to handle checksum offload command reply from OSA card.
  5625. * Verify that required features have been enabled on the card.
  5626. * Return error in hdr->return_code as this value is checked by caller.
  5627. *
  5628. * Always returns zero to indicate no further messages from the OSA card.
  5629. */
  5630. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5631. struct qeth_reply *reply,
  5632. unsigned long data)
  5633. {
  5634. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5635. struct qeth_checksum_cmd *chksum_cb =
  5636. (struct qeth_checksum_cmd *)reply->param;
  5637. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5638. if (qeth_setassparms_inspect_rc(cmd))
  5639. return 0;
  5640. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5641. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5642. chksum_cb->supported =
  5643. cmd->data.setassparms.data.chksum.supported;
  5644. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5645. }
  5646. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5647. chksum_cb->supported =
  5648. cmd->data.setassparms.data.chksum.supported;
  5649. chksum_cb->enabled =
  5650. cmd->data.setassparms.data.chksum.enabled;
  5651. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5652. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5653. }
  5654. return 0;
  5655. }
  5656. /* Send command to OSA card and check results. */
  5657. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5658. enum qeth_ipa_funcs ipa_func,
  5659. __u16 cmd_code, long data,
  5660. struct qeth_checksum_cmd *chksum_cb,
  5661. enum qeth_prot_versions prot)
  5662. {
  5663. struct qeth_cmd_buffer *iob;
  5664. int rc = -ENOMEM;
  5665. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5666. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5667. sizeof(__u32), prot);
  5668. if (iob)
  5669. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5670. qeth_ipa_checksum_run_cmd_cb,
  5671. chksum_cb);
  5672. return rc;
  5673. }
  5674. static int qeth_send_checksum_on(struct qeth_card *card, int cstype,
  5675. enum qeth_prot_versions prot)
  5676. {
  5677. u32 required_features = QETH_IPA_CHECKSUM_UDP | QETH_IPA_CHECKSUM_TCP;
  5678. struct qeth_checksum_cmd chksum_cb;
  5679. int rc;
  5680. if (prot == QETH_PROT_IPV4)
  5681. required_features |= QETH_IPA_CHECKSUM_IP_HDR;
  5682. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5683. &chksum_cb, prot);
  5684. if (!rc) {
  5685. if ((required_features & chksum_cb.supported) !=
  5686. required_features)
  5687. rc = -EIO;
  5688. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5689. cstype == IPA_INBOUND_CHECKSUM)
  5690. dev_warn(&card->gdev->dev,
  5691. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5692. QETH_CARD_IFNAME(card));
  5693. }
  5694. if (rc) {
  5695. qeth_send_simple_setassparms_prot(card, cstype,
  5696. IPA_CMD_ASS_STOP, 0, prot);
  5697. dev_warn(&card->gdev->dev,
  5698. "Starting HW IPv%d checksumming for %s failed, using SW checksumming\n",
  5699. prot, QETH_CARD_IFNAME(card));
  5700. return rc;
  5701. }
  5702. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5703. chksum_cb.supported, &chksum_cb,
  5704. prot);
  5705. if (!rc) {
  5706. if ((required_features & chksum_cb.enabled) !=
  5707. required_features)
  5708. rc = -EIO;
  5709. }
  5710. if (rc) {
  5711. qeth_send_simple_setassparms_prot(card, cstype,
  5712. IPA_CMD_ASS_STOP, 0, prot);
  5713. dev_warn(&card->gdev->dev,
  5714. "Enabling HW IPv%d checksumming for %s failed, using SW checksumming\n",
  5715. prot, QETH_CARD_IFNAME(card));
  5716. return rc;
  5717. }
  5718. dev_info(&card->gdev->dev, "HW Checksumming (%sbound IPv%d) enabled\n",
  5719. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out", prot);
  5720. return 0;
  5721. }
  5722. static int qeth_set_ipa_csum(struct qeth_card *card, bool on, int cstype,
  5723. enum qeth_prot_versions prot)
  5724. {
  5725. int rc = (on) ? qeth_send_checksum_on(card, cstype, prot)
  5726. : qeth_send_simple_setassparms_prot(card, cstype,
  5727. IPA_CMD_ASS_STOP, 0,
  5728. prot);
  5729. return rc ? -EIO : 0;
  5730. }
  5731. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5732. {
  5733. int rc;
  5734. QETH_CARD_TEXT(card, 3, "sttso");
  5735. if (on) {
  5736. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5737. IPA_CMD_ASS_START, 0);
  5738. if (rc) {
  5739. dev_warn(&card->gdev->dev,
  5740. "Starting outbound TCP segmentation offload for %s failed\n",
  5741. QETH_CARD_IFNAME(card));
  5742. return -EIO;
  5743. }
  5744. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5745. } else {
  5746. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5747. IPA_CMD_ASS_STOP, 0);
  5748. }
  5749. return rc;
  5750. }
  5751. static int qeth_set_ipa_rx_csum(struct qeth_card *card, bool on)
  5752. {
  5753. int rc_ipv4 = (on) ? -EOPNOTSUPP : 0;
  5754. int rc_ipv6;
  5755. if (qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5756. rc_ipv4 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
  5757. QETH_PROT_IPV4);
  5758. if (!qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
  5759. /* no/one Offload Assist available, so the rc is trivial */
  5760. return rc_ipv4;
  5761. rc_ipv6 = qeth_set_ipa_csum(card, on, IPA_INBOUND_CHECKSUM,
  5762. QETH_PROT_IPV6);
  5763. if (on)
  5764. /* enable: success if any Assist is active */
  5765. return (rc_ipv6) ? rc_ipv4 : 0;
  5766. /* disable: failure if any Assist is still active */
  5767. return (rc_ipv6) ? rc_ipv6 : rc_ipv4;
  5768. }
  5769. #define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO | \
  5770. NETIF_F_IPV6_CSUM)
  5771. /**
  5772. * qeth_enable_hw_features() - (Re-)Enable HW functions for device features
  5773. * @dev: a net_device
  5774. */
  5775. void qeth_enable_hw_features(struct net_device *dev)
  5776. {
  5777. struct qeth_card *card = dev->ml_priv;
  5778. netdev_features_t features;
  5779. rtnl_lock();
  5780. features = dev->features;
  5781. /* force-off any feature that needs an IPA sequence.
  5782. * netdev_update_features() will restart them.
  5783. */
  5784. dev->features &= ~QETH_HW_FEATURES;
  5785. netdev_update_features(dev);
  5786. if (features != dev->features)
  5787. dev_warn(&card->gdev->dev,
  5788. "Device recovery failed to restore all offload features\n");
  5789. rtnl_unlock();
  5790. }
  5791. EXPORT_SYMBOL_GPL(qeth_enable_hw_features);
  5792. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5793. {
  5794. struct qeth_card *card = dev->ml_priv;
  5795. netdev_features_t changed = dev->features ^ features;
  5796. int rc = 0;
  5797. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5798. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5799. if ((changed & NETIF_F_IP_CSUM)) {
  5800. rc = qeth_set_ipa_csum(card, features & NETIF_F_IP_CSUM,
  5801. IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV4);
  5802. if (rc)
  5803. changed ^= NETIF_F_IP_CSUM;
  5804. }
  5805. if (changed & NETIF_F_IPV6_CSUM) {
  5806. rc = qeth_set_ipa_csum(card, features & NETIF_F_IPV6_CSUM,
  5807. IPA_OUTBOUND_CHECKSUM, QETH_PROT_IPV6);
  5808. if (rc)
  5809. changed ^= NETIF_F_IPV6_CSUM;
  5810. }
  5811. if (changed & NETIF_F_RXCSUM) {
  5812. rc = qeth_set_ipa_rx_csum(card, features & NETIF_F_RXCSUM);
  5813. if (rc)
  5814. changed ^= NETIF_F_RXCSUM;
  5815. }
  5816. if ((changed & NETIF_F_TSO)) {
  5817. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5818. if (rc)
  5819. changed ^= NETIF_F_TSO;
  5820. }
  5821. /* everything changed successfully? */
  5822. if ((dev->features ^ features) == changed)
  5823. return 0;
  5824. /* something went wrong. save changed features and return error */
  5825. dev->features ^= changed;
  5826. return -EIO;
  5827. }
  5828. EXPORT_SYMBOL_GPL(qeth_set_features);
  5829. netdev_features_t qeth_fix_features(struct net_device *dev,
  5830. netdev_features_t features)
  5831. {
  5832. struct qeth_card *card = dev->ml_priv;
  5833. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5834. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5835. features &= ~NETIF_F_IP_CSUM;
  5836. if (!qeth_is_supported6(card, IPA_OUTBOUND_CHECKSUM_V6))
  5837. features &= ~NETIF_F_IPV6_CSUM;
  5838. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM) &&
  5839. !qeth_is_supported6(card, IPA_INBOUND_CHECKSUM_V6))
  5840. features &= ~NETIF_F_RXCSUM;
  5841. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
  5842. features &= ~NETIF_F_TSO;
  5843. /* if the card isn't up, remove features that require hw changes */
  5844. if (card->state == CARD_STATE_DOWN ||
  5845. card->state == CARD_STATE_RECOVER)
  5846. features &= ~QETH_HW_FEATURES;
  5847. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5848. return features;
  5849. }
  5850. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5851. netdev_features_t qeth_features_check(struct sk_buff *skb,
  5852. struct net_device *dev,
  5853. netdev_features_t features)
  5854. {
  5855. /* GSO segmentation builds skbs with
  5856. * a (small) linear part for the headers, and
  5857. * page frags for the data.
  5858. * Compared to a linear skb, the header-only part consumes an
  5859. * additional buffer element. This reduces buffer utilization, and
  5860. * hurts throughput. So compress small segments into one element.
  5861. */
  5862. if (netif_needs_gso(skb, features)) {
  5863. /* match skb_segment(): */
  5864. unsigned int doffset = skb->data - skb_mac_header(skb);
  5865. unsigned int hsize = skb_shinfo(skb)->gso_size;
  5866. unsigned int hroom = skb_headroom(skb);
  5867. /* linearize only if resulting skb allocations are order-0: */
  5868. if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
  5869. features &= ~NETIF_F_SG;
  5870. }
  5871. return vlan_features_check(skb, features);
  5872. }
  5873. EXPORT_SYMBOL_GPL(qeth_features_check);
  5874. static int __init qeth_core_init(void)
  5875. {
  5876. int rc;
  5877. pr_info("loading core functions\n");
  5878. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5879. INIT_LIST_HEAD(&qeth_dbf_list);
  5880. rwlock_init(&qeth_core_card_list.rwlock);
  5881. mutex_init(&qeth_mod_mutex);
  5882. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5883. if (!qeth_wq) {
  5884. rc = -ENOMEM;
  5885. goto out_err;
  5886. }
  5887. rc = qeth_register_dbf_views();
  5888. if (rc)
  5889. goto dbf_err;
  5890. qeth_core_root_dev = root_device_register("qeth");
  5891. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5892. if (rc)
  5893. goto register_err;
  5894. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5895. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5896. if (!qeth_core_header_cache) {
  5897. rc = -ENOMEM;
  5898. goto slab_err;
  5899. }
  5900. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5901. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5902. if (!qeth_qdio_outbuf_cache) {
  5903. rc = -ENOMEM;
  5904. goto cqslab_err;
  5905. }
  5906. rc = ccw_driver_register(&qeth_ccw_driver);
  5907. if (rc)
  5908. goto ccw_err;
  5909. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5910. if (rc)
  5911. goto ccwgroup_err;
  5912. return 0;
  5913. ccwgroup_err:
  5914. ccw_driver_unregister(&qeth_ccw_driver);
  5915. ccw_err:
  5916. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5917. cqslab_err:
  5918. kmem_cache_destroy(qeth_core_header_cache);
  5919. slab_err:
  5920. root_device_unregister(qeth_core_root_dev);
  5921. register_err:
  5922. qeth_unregister_dbf_views();
  5923. dbf_err:
  5924. destroy_workqueue(qeth_wq);
  5925. out_err:
  5926. pr_err("Initializing the qeth device driver failed\n");
  5927. return rc;
  5928. }
  5929. static void __exit qeth_core_exit(void)
  5930. {
  5931. qeth_clear_dbf_list();
  5932. destroy_workqueue(qeth_wq);
  5933. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5934. ccw_driver_unregister(&qeth_ccw_driver);
  5935. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5936. kmem_cache_destroy(qeth_core_header_cache);
  5937. root_device_unregister(qeth_core_root_dev);
  5938. qeth_unregister_dbf_views();
  5939. pr_info("core functions removed\n");
  5940. }
  5941. module_init(qeth_core_init);
  5942. module_exit(qeth_core_exit);
  5943. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5944. MODULE_DESCRIPTION("qeth core functions");
  5945. MODULE_LICENSE("GPL");