hibmc_ttm.c 13 KB

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  1. /* Hisilicon Hibmc SoC drm driver
  2. *
  3. * Based on the bochs drm driver.
  4. *
  5. * Copyright (c) 2016 Huawei Limited.
  6. *
  7. * Author:
  8. * Rongrong Zou <zourongrong@huawei.com>
  9. * Rongrong Zou <zourongrong@gmail.com>
  10. * Jianhua Li <lijianhua@huawei.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. */
  18. #include <drm/drm_atomic_helper.h>
  19. #include <drm/ttm/ttm_page_alloc.h>
  20. #include "hibmc_drm_drv.h"
  21. #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  22. static inline struct hibmc_drm_private *
  23. hibmc_bdev(struct ttm_bo_device *bd)
  24. {
  25. return container_of(bd, struct hibmc_drm_private, bdev);
  26. }
  27. static int
  28. hibmc_ttm_mem_global_init(struct drm_global_reference *ref)
  29. {
  30. return ttm_mem_global_init(ref->object);
  31. }
  32. static void
  33. hibmc_ttm_mem_global_release(struct drm_global_reference *ref)
  34. {
  35. ttm_mem_global_release(ref->object);
  36. }
  37. static int hibmc_ttm_global_init(struct hibmc_drm_private *hibmc)
  38. {
  39. int ret;
  40. hibmc->mem_global_ref.global_type = DRM_GLOBAL_TTM_MEM;
  41. hibmc->mem_global_ref.size = sizeof(struct ttm_mem_global);
  42. hibmc->mem_global_ref.init = &hibmc_ttm_mem_global_init;
  43. hibmc->mem_global_ref.release = &hibmc_ttm_mem_global_release;
  44. ret = drm_global_item_ref(&hibmc->mem_global_ref);
  45. if (ret) {
  46. DRM_ERROR("could not get ref on ttm global: %d\n", ret);
  47. return ret;
  48. }
  49. hibmc->bo_global_ref.mem_glob =
  50. hibmc->mem_global_ref.object;
  51. hibmc->bo_global_ref.ref.global_type = DRM_GLOBAL_TTM_BO;
  52. hibmc->bo_global_ref.ref.size = sizeof(struct ttm_bo_global);
  53. hibmc->bo_global_ref.ref.init = &ttm_bo_global_init;
  54. hibmc->bo_global_ref.ref.release = &ttm_bo_global_release;
  55. ret = drm_global_item_ref(&hibmc->bo_global_ref.ref);
  56. if (ret) {
  57. DRM_ERROR("failed setting up TTM BO subsystem: %d\n", ret);
  58. drm_global_item_unref(&hibmc->mem_global_ref);
  59. return ret;
  60. }
  61. return 0;
  62. }
  63. static void
  64. hibmc_ttm_global_release(struct hibmc_drm_private *hibmc)
  65. {
  66. drm_global_item_unref(&hibmc->bo_global_ref.ref);
  67. drm_global_item_unref(&hibmc->mem_global_ref);
  68. hibmc->mem_global_ref.release = NULL;
  69. }
  70. static void hibmc_bo_ttm_destroy(struct ttm_buffer_object *tbo)
  71. {
  72. struct hibmc_bo *bo = container_of(tbo, struct hibmc_bo, bo);
  73. drm_gem_object_release(&bo->gem);
  74. kfree(bo);
  75. }
  76. static bool hibmc_ttm_bo_is_hibmc_bo(struct ttm_buffer_object *bo)
  77. {
  78. return bo->destroy == &hibmc_bo_ttm_destroy;
  79. }
  80. static int
  81. hibmc_bo_init_mem_type(struct ttm_bo_device *bdev, u32 type,
  82. struct ttm_mem_type_manager *man)
  83. {
  84. switch (type) {
  85. case TTM_PL_SYSTEM:
  86. man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
  87. man->available_caching = TTM_PL_MASK_CACHING;
  88. man->default_caching = TTM_PL_FLAG_CACHED;
  89. break;
  90. case TTM_PL_VRAM:
  91. man->func = &ttm_bo_manager_func;
  92. man->flags = TTM_MEMTYPE_FLAG_FIXED |
  93. TTM_MEMTYPE_FLAG_MAPPABLE;
  94. man->available_caching = TTM_PL_FLAG_UNCACHED |
  95. TTM_PL_FLAG_WC;
  96. man->default_caching = TTM_PL_FLAG_WC;
  97. break;
  98. default:
  99. DRM_ERROR("unsupported memory type %u\n", type);
  100. return -EINVAL;
  101. }
  102. return 0;
  103. }
  104. void hibmc_ttm_placement(struct hibmc_bo *bo, int domain)
  105. {
  106. u32 count = 0;
  107. u32 i;
  108. bo->placement.placement = bo->placements;
  109. bo->placement.busy_placement = bo->placements;
  110. if (domain & TTM_PL_FLAG_VRAM)
  111. bo->placements[count++].flags = TTM_PL_FLAG_WC |
  112. TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_VRAM;
  113. if (domain & TTM_PL_FLAG_SYSTEM)
  114. bo->placements[count++].flags = TTM_PL_MASK_CACHING |
  115. TTM_PL_FLAG_SYSTEM;
  116. if (!count)
  117. bo->placements[count++].flags = TTM_PL_MASK_CACHING |
  118. TTM_PL_FLAG_SYSTEM;
  119. bo->placement.num_placement = count;
  120. bo->placement.num_busy_placement = count;
  121. for (i = 0; i < count; i++) {
  122. bo->placements[i].fpfn = 0;
  123. bo->placements[i].lpfn = 0;
  124. }
  125. }
  126. static void
  127. hibmc_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
  128. {
  129. struct hibmc_bo *hibmcbo = hibmc_bo(bo);
  130. if (!hibmc_ttm_bo_is_hibmc_bo(bo))
  131. return;
  132. hibmc_ttm_placement(hibmcbo, TTM_PL_FLAG_SYSTEM);
  133. *pl = hibmcbo->placement;
  134. }
  135. static int hibmc_bo_verify_access(struct ttm_buffer_object *bo,
  136. struct file *filp)
  137. {
  138. struct hibmc_bo *hibmcbo = hibmc_bo(bo);
  139. return drm_vma_node_verify_access(&hibmcbo->gem.vma_node,
  140. filp->private_data);
  141. }
  142. static int hibmc_ttm_io_mem_reserve(struct ttm_bo_device *bdev,
  143. struct ttm_mem_reg *mem)
  144. {
  145. struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
  146. struct hibmc_drm_private *hibmc = hibmc_bdev(bdev);
  147. mem->bus.addr = NULL;
  148. mem->bus.offset = 0;
  149. mem->bus.size = mem->num_pages << PAGE_SHIFT;
  150. mem->bus.base = 0;
  151. mem->bus.is_iomem = false;
  152. if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
  153. return -EINVAL;
  154. switch (mem->mem_type) {
  155. case TTM_PL_SYSTEM:
  156. /* system memory */
  157. return 0;
  158. case TTM_PL_VRAM:
  159. mem->bus.offset = mem->start << PAGE_SHIFT;
  160. mem->bus.base = pci_resource_start(hibmc->dev->pdev, 0);
  161. mem->bus.is_iomem = true;
  162. break;
  163. default:
  164. return -EINVAL;
  165. }
  166. return 0;
  167. }
  168. static void hibmc_ttm_backend_destroy(struct ttm_tt *tt)
  169. {
  170. ttm_tt_fini(tt);
  171. kfree(tt);
  172. }
  173. static struct ttm_backend_func hibmc_tt_backend_func = {
  174. .destroy = &hibmc_ttm_backend_destroy,
  175. };
  176. static struct ttm_tt *hibmc_ttm_tt_create(struct ttm_buffer_object *bo,
  177. u32 page_flags)
  178. {
  179. struct ttm_tt *tt;
  180. int ret;
  181. tt = kzalloc(sizeof(*tt), GFP_KERNEL);
  182. if (!tt) {
  183. DRM_ERROR("failed to allocate ttm_tt\n");
  184. return NULL;
  185. }
  186. tt->func = &hibmc_tt_backend_func;
  187. ret = ttm_tt_init(tt, bo, page_flags);
  188. if (ret) {
  189. DRM_ERROR("failed to initialize ttm_tt: %d\n", ret);
  190. kfree(tt);
  191. return NULL;
  192. }
  193. return tt;
  194. }
  195. struct ttm_bo_driver hibmc_bo_driver = {
  196. .ttm_tt_create = hibmc_ttm_tt_create,
  197. .init_mem_type = hibmc_bo_init_mem_type,
  198. .evict_flags = hibmc_bo_evict_flags,
  199. .move = NULL,
  200. .verify_access = hibmc_bo_verify_access,
  201. .io_mem_reserve = &hibmc_ttm_io_mem_reserve,
  202. .io_mem_free = NULL,
  203. };
  204. int hibmc_mm_init(struct hibmc_drm_private *hibmc)
  205. {
  206. int ret;
  207. struct drm_device *dev = hibmc->dev;
  208. struct ttm_bo_device *bdev = &hibmc->bdev;
  209. ret = hibmc_ttm_global_init(hibmc);
  210. if (ret)
  211. return ret;
  212. ret = ttm_bo_device_init(&hibmc->bdev,
  213. hibmc->bo_global_ref.ref.object,
  214. &hibmc_bo_driver,
  215. dev->anon_inode->i_mapping,
  216. DRM_FILE_PAGE_OFFSET,
  217. true);
  218. if (ret) {
  219. hibmc_ttm_global_release(hibmc);
  220. DRM_ERROR("error initializing bo driver: %d\n", ret);
  221. return ret;
  222. }
  223. ret = ttm_bo_init_mm(bdev, TTM_PL_VRAM,
  224. hibmc->fb_size >> PAGE_SHIFT);
  225. if (ret) {
  226. hibmc_ttm_global_release(hibmc);
  227. DRM_ERROR("failed ttm VRAM init: %d\n", ret);
  228. return ret;
  229. }
  230. hibmc->mm_inited = true;
  231. return 0;
  232. }
  233. void hibmc_mm_fini(struct hibmc_drm_private *hibmc)
  234. {
  235. if (!hibmc->mm_inited)
  236. return;
  237. ttm_bo_device_release(&hibmc->bdev);
  238. hibmc_ttm_global_release(hibmc);
  239. hibmc->mm_inited = false;
  240. }
  241. static void hibmc_bo_unref(struct hibmc_bo **bo)
  242. {
  243. struct ttm_buffer_object *tbo;
  244. if ((*bo) == NULL)
  245. return;
  246. tbo = &((*bo)->bo);
  247. ttm_bo_unref(&tbo);
  248. *bo = NULL;
  249. }
  250. int hibmc_bo_create(struct drm_device *dev, int size, int align,
  251. u32 flags, struct hibmc_bo **phibmcbo)
  252. {
  253. struct hibmc_drm_private *hibmc = dev->dev_private;
  254. struct hibmc_bo *hibmcbo;
  255. size_t acc_size;
  256. int ret;
  257. hibmcbo = kzalloc(sizeof(*hibmcbo), GFP_KERNEL);
  258. if (!hibmcbo) {
  259. DRM_ERROR("failed to allocate hibmcbo\n");
  260. return -ENOMEM;
  261. }
  262. ret = drm_gem_object_init(dev, &hibmcbo->gem, size);
  263. if (ret) {
  264. DRM_ERROR("failed to initialize drm gem object: %d\n", ret);
  265. kfree(hibmcbo);
  266. return ret;
  267. }
  268. hibmcbo->bo.bdev = &hibmc->bdev;
  269. hibmc_ttm_placement(hibmcbo, TTM_PL_FLAG_VRAM | TTM_PL_FLAG_SYSTEM);
  270. acc_size = ttm_bo_dma_acc_size(&hibmc->bdev, size,
  271. sizeof(struct hibmc_bo));
  272. ret = ttm_bo_init(&hibmc->bdev, &hibmcbo->bo, size,
  273. ttm_bo_type_device, &hibmcbo->placement,
  274. align >> PAGE_SHIFT, false, acc_size,
  275. NULL, NULL, hibmc_bo_ttm_destroy);
  276. if (ret) {
  277. hibmc_bo_unref(&hibmcbo);
  278. DRM_ERROR("failed to initialize ttm_bo: %d\n", ret);
  279. return ret;
  280. }
  281. *phibmcbo = hibmcbo;
  282. return 0;
  283. }
  284. int hibmc_bo_pin(struct hibmc_bo *bo, u32 pl_flag, u64 *gpu_addr)
  285. {
  286. struct ttm_operation_ctx ctx = { false, false };
  287. int i, ret;
  288. if (bo->pin_count) {
  289. bo->pin_count++;
  290. if (gpu_addr)
  291. *gpu_addr = bo->bo.offset;
  292. return 0;
  293. }
  294. hibmc_ttm_placement(bo, pl_flag);
  295. for (i = 0; i < bo->placement.num_placement; i++)
  296. bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
  297. ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
  298. if (ret)
  299. return ret;
  300. bo->pin_count = 1;
  301. if (gpu_addr)
  302. *gpu_addr = bo->bo.offset;
  303. return 0;
  304. }
  305. int hibmc_bo_unpin(struct hibmc_bo *bo)
  306. {
  307. struct ttm_operation_ctx ctx = { false, false };
  308. int i, ret;
  309. if (!bo->pin_count) {
  310. DRM_ERROR("unpin bad %p\n", bo);
  311. return 0;
  312. }
  313. bo->pin_count--;
  314. if (bo->pin_count)
  315. return 0;
  316. for (i = 0; i < bo->placement.num_placement ; i++)
  317. bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
  318. ret = ttm_bo_validate(&bo->bo, &bo->placement, &ctx);
  319. if (ret) {
  320. DRM_ERROR("validate failed for unpin: %d\n", ret);
  321. return ret;
  322. }
  323. return 0;
  324. }
  325. int hibmc_mmap(struct file *filp, struct vm_area_struct *vma)
  326. {
  327. struct drm_file *file_priv;
  328. struct hibmc_drm_private *hibmc;
  329. if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
  330. return -EINVAL;
  331. file_priv = filp->private_data;
  332. hibmc = file_priv->minor->dev->dev_private;
  333. return ttm_bo_mmap(filp, vma, &hibmc->bdev);
  334. }
  335. int hibmc_gem_create(struct drm_device *dev, u32 size, bool iskernel,
  336. struct drm_gem_object **obj)
  337. {
  338. struct hibmc_bo *hibmcbo;
  339. int ret;
  340. *obj = NULL;
  341. size = PAGE_ALIGN(size);
  342. if (size == 0) {
  343. DRM_ERROR("error: zero size\n");
  344. return -EINVAL;
  345. }
  346. ret = hibmc_bo_create(dev, size, 0, 0, &hibmcbo);
  347. if (ret) {
  348. if (ret != -ERESTARTSYS)
  349. DRM_ERROR("failed to allocate GEM object: %d\n", ret);
  350. return ret;
  351. }
  352. *obj = &hibmcbo->gem;
  353. return 0;
  354. }
  355. int hibmc_dumb_create(struct drm_file *file, struct drm_device *dev,
  356. struct drm_mode_create_dumb *args)
  357. {
  358. struct drm_gem_object *gobj;
  359. u32 handle;
  360. int ret;
  361. args->pitch = ALIGN(args->width * DIV_ROUND_UP(args->bpp, 8), 16);
  362. args->size = args->pitch * args->height;
  363. ret = hibmc_gem_create(dev, args->size, false,
  364. &gobj);
  365. if (ret) {
  366. DRM_ERROR("failed to create GEM object: %d\n", ret);
  367. return ret;
  368. }
  369. ret = drm_gem_handle_create(file, gobj, &handle);
  370. drm_gem_object_put_unlocked(gobj);
  371. if (ret) {
  372. DRM_ERROR("failed to unreference GEM object: %d\n", ret);
  373. return ret;
  374. }
  375. args->handle = handle;
  376. return 0;
  377. }
  378. void hibmc_gem_free_object(struct drm_gem_object *obj)
  379. {
  380. struct hibmc_bo *hibmcbo = gem_to_hibmc_bo(obj);
  381. hibmc_bo_unref(&hibmcbo);
  382. }
  383. static u64 hibmc_bo_mmap_offset(struct hibmc_bo *bo)
  384. {
  385. return drm_vma_node_offset_addr(&bo->bo.vma_node);
  386. }
  387. int hibmc_dumb_mmap_offset(struct drm_file *file, struct drm_device *dev,
  388. u32 handle, u64 *offset)
  389. {
  390. struct drm_gem_object *obj;
  391. struct hibmc_bo *bo;
  392. obj = drm_gem_object_lookup(file, handle);
  393. if (!obj)
  394. return -ENOENT;
  395. bo = gem_to_hibmc_bo(obj);
  396. *offset = hibmc_bo_mmap_offset(bo);
  397. drm_gem_object_put_unlocked(obj);
  398. return 0;
  399. }
  400. static void hibmc_user_framebuffer_destroy(struct drm_framebuffer *fb)
  401. {
  402. struct hibmc_framebuffer *hibmc_fb = to_hibmc_framebuffer(fb);
  403. drm_gem_object_put_unlocked(hibmc_fb->obj);
  404. drm_framebuffer_cleanup(fb);
  405. kfree(hibmc_fb);
  406. }
  407. static const struct drm_framebuffer_funcs hibmc_fb_funcs = {
  408. .destroy = hibmc_user_framebuffer_destroy,
  409. };
  410. struct hibmc_framebuffer *
  411. hibmc_framebuffer_init(struct drm_device *dev,
  412. const struct drm_mode_fb_cmd2 *mode_cmd,
  413. struct drm_gem_object *obj)
  414. {
  415. struct hibmc_framebuffer *hibmc_fb;
  416. int ret;
  417. hibmc_fb = kzalloc(sizeof(*hibmc_fb), GFP_KERNEL);
  418. if (!hibmc_fb) {
  419. DRM_ERROR("failed to allocate hibmc_fb\n");
  420. return ERR_PTR(-ENOMEM);
  421. }
  422. drm_helper_mode_fill_fb_struct(dev, &hibmc_fb->fb, mode_cmd);
  423. hibmc_fb->obj = obj;
  424. ret = drm_framebuffer_init(dev, &hibmc_fb->fb, &hibmc_fb_funcs);
  425. if (ret) {
  426. DRM_ERROR("drm_framebuffer_init failed: %d\n", ret);
  427. kfree(hibmc_fb);
  428. return ERR_PTR(ret);
  429. }
  430. return hibmc_fb;
  431. }
  432. static struct drm_framebuffer *
  433. hibmc_user_framebuffer_create(struct drm_device *dev,
  434. struct drm_file *filp,
  435. const struct drm_mode_fb_cmd2 *mode_cmd)
  436. {
  437. struct drm_gem_object *obj;
  438. struct hibmc_framebuffer *hibmc_fb;
  439. DRM_DEBUG_DRIVER("%dx%d, format %c%c%c%c\n",
  440. mode_cmd->width, mode_cmd->height,
  441. (mode_cmd->pixel_format) & 0xff,
  442. (mode_cmd->pixel_format >> 8) & 0xff,
  443. (mode_cmd->pixel_format >> 16) & 0xff,
  444. (mode_cmd->pixel_format >> 24) & 0xff);
  445. obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
  446. if (!obj)
  447. return ERR_PTR(-ENOENT);
  448. hibmc_fb = hibmc_framebuffer_init(dev, mode_cmd, obj);
  449. if (IS_ERR(hibmc_fb)) {
  450. drm_gem_object_put_unlocked(obj);
  451. return ERR_PTR((long)hibmc_fb);
  452. }
  453. return &hibmc_fb->fb;
  454. }
  455. const struct drm_mode_config_funcs hibmc_mode_funcs = {
  456. .atomic_check = drm_atomic_helper_check,
  457. .atomic_commit = drm_atomic_helper_commit,
  458. .fb_create = hibmc_user_framebuffer_create,
  459. };