tsi108_eth.c 46 KB

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  1. /*******************************************************************************
  2. Copyright(c) 2006 Tundra Semiconductor Corporation.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. *******************************************************************************/
  15. /* This driver is based on the driver code originally developed
  16. * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
  17. * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
  18. *
  19. * Currently changes from original version are:
  20. * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
  21. * - modifications to handle two ports independently and support for
  22. * additional PHY devices (alexandre.bounine@tundra.com)
  23. * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
  24. *
  25. */
  26. #include <linux/module.h>
  27. #include <linux/types.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/net.h>
  30. #include <linux/netdevice.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/ethtool.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/delay.h>
  36. #include <linux/crc32.h>
  37. #include <linux/mii.h>
  38. #include <linux/device.h>
  39. #include <linux/pci.h>
  40. #include <linux/rtnetlink.h>
  41. #include <linux/timer.h>
  42. #include <linux/platform_device.h>
  43. #include <linux/gfp.h>
  44. #include <asm/io.h>
  45. #include <asm/tsi108.h>
  46. #include "tsi108_eth.h"
  47. #define MII_READ_DELAY 10000 /* max link wait time in msec */
  48. #define TSI108_RXRING_LEN 256
  49. /* NOTE: The driver currently does not support receiving packets
  50. * larger than the buffer size, so don't decrease this (unless you
  51. * want to add such support).
  52. */
  53. #define TSI108_RXBUF_SIZE 1536
  54. #define TSI108_TXRING_LEN 256
  55. #define TSI108_TX_INT_FREQ 64
  56. /* Check the phy status every half a second. */
  57. #define CHECK_PHY_INTERVAL (HZ/2)
  58. static int tsi108_init_one(struct platform_device *pdev);
  59. static int tsi108_ether_remove(struct platform_device *pdev);
  60. struct tsi108_prv_data {
  61. void __iomem *regs; /* Base of normal regs */
  62. void __iomem *phyregs; /* Base of register bank used for PHY access */
  63. struct net_device *dev;
  64. struct napi_struct napi;
  65. unsigned int phy; /* Index of PHY for this interface */
  66. unsigned int irq_num;
  67. unsigned int id;
  68. unsigned int phy_type;
  69. struct timer_list timer;/* Timer that triggers the check phy function */
  70. unsigned int rxtail; /* Next entry in rxring to read */
  71. unsigned int rxhead; /* Next entry in rxring to give a new buffer */
  72. unsigned int rxfree; /* Number of free, allocated RX buffers */
  73. unsigned int rxpending; /* Non-zero if there are still descriptors
  74. * to be processed from a previous descriptor
  75. * interrupt condition that has been cleared */
  76. unsigned int txtail; /* Next TX descriptor to check status on */
  77. unsigned int txhead; /* Next TX descriptor to use */
  78. /* Number of free TX descriptors. This could be calculated from
  79. * rxhead and rxtail if one descriptor were left unused to disambiguate
  80. * full and empty conditions, but it's simpler to just keep track
  81. * explicitly. */
  82. unsigned int txfree;
  83. unsigned int phy_ok; /* The PHY is currently powered on. */
  84. /* PHY status (duplex is 1 for half, 2 for full,
  85. * so that the default 0 indicates that neither has
  86. * yet been configured). */
  87. unsigned int link_up;
  88. unsigned int speed;
  89. unsigned int duplex;
  90. tx_desc *txring;
  91. rx_desc *rxring;
  92. struct sk_buff *txskbs[TSI108_TXRING_LEN];
  93. struct sk_buff *rxskbs[TSI108_RXRING_LEN];
  94. dma_addr_t txdma, rxdma;
  95. /* txlock nests in misclock and phy_lock */
  96. spinlock_t txlock, misclock;
  97. /* stats is used to hold the upper bits of each hardware counter,
  98. * and tmpstats is used to hold the full values for returning
  99. * to the caller of get_stats(). They must be separate in case
  100. * an overflow interrupt occurs before the stats are consumed.
  101. */
  102. struct net_device_stats stats;
  103. struct net_device_stats tmpstats;
  104. /* These stats are kept separate in hardware, thus require individual
  105. * fields for handling carry. They are combined in get_stats.
  106. */
  107. unsigned long rx_fcs; /* Add to rx_frame_errors */
  108. unsigned long rx_short_fcs; /* Add to rx_frame_errors */
  109. unsigned long rx_long_fcs; /* Add to rx_frame_errors */
  110. unsigned long rx_underruns; /* Add to rx_length_errors */
  111. unsigned long rx_overruns; /* Add to rx_length_errors */
  112. unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
  113. unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
  114. unsigned long mc_hash[16];
  115. u32 msg_enable; /* debug message level */
  116. struct mii_if_info mii_if;
  117. unsigned int init_media;
  118. struct platform_device *pdev;
  119. };
  120. /* Structure for a device driver */
  121. static struct platform_driver tsi_eth_driver = {
  122. .probe = tsi108_init_one,
  123. .remove = tsi108_ether_remove,
  124. .driver = {
  125. .name = "tsi-ethernet",
  126. },
  127. };
  128. static void tsi108_timed_checker(struct timer_list *t);
  129. #ifdef DEBUG
  130. static void dump_eth_one(struct net_device *dev)
  131. {
  132. struct tsi108_prv_data *data = netdev_priv(dev);
  133. printk("Dumping %s...\n", dev->name);
  134. printk("intstat %x intmask %x phy_ok %d"
  135. " link %d speed %d duplex %d\n",
  136. TSI_READ(TSI108_EC_INTSTAT),
  137. TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
  138. data->link_up, data->speed, data->duplex);
  139. printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
  140. data->txhead, data->txtail, data->txfree,
  141. TSI_READ(TSI108_EC_TXSTAT),
  142. TSI_READ(TSI108_EC_TXESTAT),
  143. TSI_READ(TSI108_EC_TXERR));
  144. printk("RX: head %d, tail %d, free %d, stat %x,"
  145. " estat %x, err %x, pending %d\n\n",
  146. data->rxhead, data->rxtail, data->rxfree,
  147. TSI_READ(TSI108_EC_RXSTAT),
  148. TSI_READ(TSI108_EC_RXESTAT),
  149. TSI_READ(TSI108_EC_RXERR), data->rxpending);
  150. }
  151. #endif
  152. /* Synchronization is needed between the thread and up/down events.
  153. * Note that the PHY is accessed through the same registers for both
  154. * interfaces, so this can't be made interface-specific.
  155. */
  156. static DEFINE_SPINLOCK(phy_lock);
  157. static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
  158. {
  159. unsigned i;
  160. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  161. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  162. (reg << TSI108_MAC_MII_ADDR_REG));
  163. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
  164. TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
  165. for (i = 0; i < 100; i++) {
  166. if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  167. (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
  168. break;
  169. udelay(10);
  170. }
  171. if (i == 100)
  172. return 0xffff;
  173. else
  174. return TSI_READ_PHY(TSI108_MAC_MII_DATAIN);
  175. }
  176. static void tsi108_write_mii(struct tsi108_prv_data *data,
  177. int reg, u16 val)
  178. {
  179. unsigned i = 100;
  180. TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
  181. (data->phy << TSI108_MAC_MII_ADDR_PHY) |
  182. (reg << TSI108_MAC_MII_ADDR_REG));
  183. TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
  184. while (i--) {
  185. if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
  186. TSI108_MAC_MII_IND_BUSY))
  187. break;
  188. udelay(10);
  189. }
  190. }
  191. static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
  192. {
  193. struct tsi108_prv_data *data = netdev_priv(dev);
  194. return tsi108_read_mii(data, reg);
  195. }
  196. static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
  197. {
  198. struct tsi108_prv_data *data = netdev_priv(dev);
  199. tsi108_write_mii(data, reg, val);
  200. }
  201. static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
  202. int reg, u16 val)
  203. {
  204. unsigned i = 1000;
  205. TSI_WRITE(TSI108_MAC_MII_ADDR,
  206. (0x1e << TSI108_MAC_MII_ADDR_PHY)
  207. | (reg << TSI108_MAC_MII_ADDR_REG));
  208. TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
  209. while(i--) {
  210. if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
  211. return;
  212. udelay(10);
  213. }
  214. printk(KERN_ERR "%s function time out\n", __func__);
  215. }
  216. static int mii_speed(struct mii_if_info *mii)
  217. {
  218. int advert, lpa, val, media;
  219. int lpa2 = 0;
  220. int speed;
  221. if (!mii_link_ok(mii))
  222. return 0;
  223. val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
  224. if ((val & BMSR_ANEGCOMPLETE) == 0)
  225. return 0;
  226. advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
  227. lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
  228. media = mii_nway_result(advert & lpa);
  229. if (mii->supports_gmii)
  230. lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
  231. speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
  232. (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
  233. return speed;
  234. }
  235. static void tsi108_check_phy(struct net_device *dev)
  236. {
  237. struct tsi108_prv_data *data = netdev_priv(dev);
  238. u32 mac_cfg2_reg, portctrl_reg;
  239. u32 duplex;
  240. u32 speed;
  241. unsigned long flags;
  242. spin_lock_irqsave(&phy_lock, flags);
  243. if (!data->phy_ok)
  244. goto out;
  245. duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
  246. data->init_media = 0;
  247. if (netif_carrier_ok(dev)) {
  248. speed = mii_speed(&data->mii_if);
  249. if ((speed != data->speed) || duplex) {
  250. mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
  251. portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
  252. mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
  253. if (speed == 1000) {
  254. mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
  255. portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
  256. } else {
  257. mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
  258. portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
  259. }
  260. data->speed = speed;
  261. if (data->mii_if.full_duplex) {
  262. mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
  263. portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
  264. data->duplex = 2;
  265. } else {
  266. mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
  267. portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
  268. data->duplex = 1;
  269. }
  270. TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
  271. TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
  272. }
  273. if (data->link_up == 0) {
  274. /* The manual says it can take 3-4 usecs for the speed change
  275. * to take effect.
  276. */
  277. udelay(5);
  278. spin_lock(&data->txlock);
  279. if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
  280. netif_wake_queue(dev);
  281. data->link_up = 1;
  282. spin_unlock(&data->txlock);
  283. }
  284. } else {
  285. if (data->link_up == 1) {
  286. netif_stop_queue(dev);
  287. data->link_up = 0;
  288. printk(KERN_NOTICE "%s : link is down\n", dev->name);
  289. }
  290. goto out;
  291. }
  292. out:
  293. spin_unlock_irqrestore(&phy_lock, flags);
  294. }
  295. static inline void
  296. tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
  297. unsigned long *upper)
  298. {
  299. if (carry & carry_bit)
  300. *upper += carry_shift;
  301. }
  302. static void tsi108_stat_carry(struct net_device *dev)
  303. {
  304. struct tsi108_prv_data *data = netdev_priv(dev);
  305. unsigned long flags;
  306. u32 carry1, carry2;
  307. spin_lock_irqsave(&data->misclock, flags);
  308. carry1 = TSI_READ(TSI108_STAT_CARRY1);
  309. carry2 = TSI_READ(TSI108_STAT_CARRY2);
  310. TSI_WRITE(TSI108_STAT_CARRY1, carry1);
  311. TSI_WRITE(TSI108_STAT_CARRY2, carry2);
  312. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
  313. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  314. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
  315. TSI108_STAT_RXPKTS_CARRY,
  316. &data->stats.rx_packets);
  317. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
  318. TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
  319. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
  320. TSI108_STAT_RXMCAST_CARRY,
  321. &data->stats.multicast);
  322. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
  323. TSI108_STAT_RXALIGN_CARRY,
  324. &data->stats.rx_frame_errors);
  325. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
  326. TSI108_STAT_RXLENGTH_CARRY,
  327. &data->stats.rx_length_errors);
  328. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
  329. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  330. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
  331. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  332. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
  333. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  334. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
  335. TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
  336. tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
  337. TSI108_STAT_RXDROP_CARRY,
  338. &data->stats.rx_missed_errors);
  339. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
  340. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  341. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
  342. TSI108_STAT_TXPKTS_CARRY,
  343. &data->stats.tx_packets);
  344. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
  345. TSI108_STAT_TXEXDEF_CARRY,
  346. &data->stats.tx_aborted_errors);
  347. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
  348. TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
  349. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
  350. TSI108_STAT_TXTCOL_CARRY,
  351. &data->stats.collisions);
  352. tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
  353. TSI108_STAT_TXPAUSEDROP_CARRY,
  354. &data->tx_pause_drop);
  355. spin_unlock_irqrestore(&data->misclock, flags);
  356. }
  357. /* Read a stat counter atomically with respect to carries.
  358. * data->misclock must be held.
  359. */
  360. static inline unsigned long
  361. tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
  362. int carry_shift, unsigned long *upper)
  363. {
  364. int carryreg;
  365. unsigned long val;
  366. if (reg < 0xb0)
  367. carryreg = TSI108_STAT_CARRY1;
  368. else
  369. carryreg = TSI108_STAT_CARRY2;
  370. again:
  371. val = TSI_READ(reg) | *upper;
  372. /* Check to see if it overflowed, but the interrupt hasn't
  373. * been serviced yet. If so, handle the carry here, and
  374. * try again.
  375. */
  376. if (unlikely(TSI_READ(carryreg) & carry_bit)) {
  377. *upper += carry_shift;
  378. TSI_WRITE(carryreg, carry_bit);
  379. goto again;
  380. }
  381. return val;
  382. }
  383. static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
  384. {
  385. unsigned long excol;
  386. struct tsi108_prv_data *data = netdev_priv(dev);
  387. spin_lock_irq(&data->misclock);
  388. data->tmpstats.rx_packets =
  389. tsi108_read_stat(data, TSI108_STAT_RXPKTS,
  390. TSI108_STAT_CARRY1_RXPKTS,
  391. TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
  392. data->tmpstats.tx_packets =
  393. tsi108_read_stat(data, TSI108_STAT_TXPKTS,
  394. TSI108_STAT_CARRY2_TXPKTS,
  395. TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
  396. data->tmpstats.rx_bytes =
  397. tsi108_read_stat(data, TSI108_STAT_RXBYTES,
  398. TSI108_STAT_CARRY1_RXBYTES,
  399. TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
  400. data->tmpstats.tx_bytes =
  401. tsi108_read_stat(data, TSI108_STAT_TXBYTES,
  402. TSI108_STAT_CARRY2_TXBYTES,
  403. TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
  404. data->tmpstats.multicast =
  405. tsi108_read_stat(data, TSI108_STAT_RXMCAST,
  406. TSI108_STAT_CARRY1_RXMCAST,
  407. TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
  408. excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
  409. TSI108_STAT_CARRY2_TXEXCOL,
  410. TSI108_STAT_TXEXCOL_CARRY,
  411. &data->tx_coll_abort);
  412. data->tmpstats.collisions =
  413. tsi108_read_stat(data, TSI108_STAT_TXTCOL,
  414. TSI108_STAT_CARRY2_TXTCOL,
  415. TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
  416. data->tmpstats.collisions += excol;
  417. data->tmpstats.rx_length_errors =
  418. tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
  419. TSI108_STAT_CARRY1_RXLENGTH,
  420. TSI108_STAT_RXLENGTH_CARRY,
  421. &data->stats.rx_length_errors);
  422. data->tmpstats.rx_length_errors +=
  423. tsi108_read_stat(data, TSI108_STAT_RXRUNT,
  424. TSI108_STAT_CARRY1_RXRUNT,
  425. TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
  426. data->tmpstats.rx_length_errors +=
  427. tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
  428. TSI108_STAT_CARRY1_RXJUMBO,
  429. TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
  430. data->tmpstats.rx_frame_errors =
  431. tsi108_read_stat(data, TSI108_STAT_RXALIGN,
  432. TSI108_STAT_CARRY1_RXALIGN,
  433. TSI108_STAT_RXALIGN_CARRY,
  434. &data->stats.rx_frame_errors);
  435. data->tmpstats.rx_frame_errors +=
  436. tsi108_read_stat(data, TSI108_STAT_RXFCS,
  437. TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
  438. &data->rx_fcs);
  439. data->tmpstats.rx_frame_errors +=
  440. tsi108_read_stat(data, TSI108_STAT_RXFRAG,
  441. TSI108_STAT_CARRY1_RXFRAG,
  442. TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
  443. data->tmpstats.rx_missed_errors =
  444. tsi108_read_stat(data, TSI108_STAT_RXDROP,
  445. TSI108_STAT_CARRY1_RXDROP,
  446. TSI108_STAT_RXDROP_CARRY,
  447. &data->stats.rx_missed_errors);
  448. /* These three are maintained by software. */
  449. data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
  450. data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
  451. data->tmpstats.tx_aborted_errors =
  452. tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
  453. TSI108_STAT_CARRY2_TXEXDEF,
  454. TSI108_STAT_TXEXDEF_CARRY,
  455. &data->stats.tx_aborted_errors);
  456. data->tmpstats.tx_aborted_errors +=
  457. tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
  458. TSI108_STAT_CARRY2_TXPAUSE,
  459. TSI108_STAT_TXPAUSEDROP_CARRY,
  460. &data->tx_pause_drop);
  461. data->tmpstats.tx_aborted_errors += excol;
  462. data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
  463. data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
  464. data->tmpstats.rx_crc_errors +
  465. data->tmpstats.rx_frame_errors +
  466. data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
  467. spin_unlock_irq(&data->misclock);
  468. return &data->tmpstats;
  469. }
  470. static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
  471. {
  472. TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
  473. TSI108_EC_RXQ_PTRHIGH_VALID);
  474. TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
  475. | TSI108_EC_RXCTRL_QUEUE0);
  476. }
  477. static void tsi108_restart_tx(struct tsi108_prv_data * data)
  478. {
  479. TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
  480. TSI108_EC_TXQ_PTRHIGH_VALID);
  481. TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
  482. TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
  483. }
  484. /* txlock must be held by caller, with IRQs disabled, and
  485. * with permission to re-enable them when the lock is dropped.
  486. */
  487. static void tsi108_complete_tx(struct net_device *dev)
  488. {
  489. struct tsi108_prv_data *data = netdev_priv(dev);
  490. int tx;
  491. struct sk_buff *skb;
  492. int release = 0;
  493. while (!data->txfree || data->txhead != data->txtail) {
  494. tx = data->txtail;
  495. if (data->txring[tx].misc & TSI108_TX_OWN)
  496. break;
  497. skb = data->txskbs[tx];
  498. if (!(data->txring[tx].misc & TSI108_TX_OK))
  499. printk("%s: bad tx packet, misc %x\n",
  500. dev->name, data->txring[tx].misc);
  501. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  502. data->txfree++;
  503. if (data->txring[tx].misc & TSI108_TX_EOF) {
  504. dev_kfree_skb_any(skb);
  505. release++;
  506. }
  507. }
  508. if (release) {
  509. if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
  510. netif_wake_queue(dev);
  511. }
  512. }
  513. static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
  514. {
  515. struct tsi108_prv_data *data = netdev_priv(dev);
  516. int frags = skb_shinfo(skb)->nr_frags + 1;
  517. int i;
  518. if (!data->phy_ok && net_ratelimit())
  519. printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
  520. if (!data->link_up) {
  521. printk(KERN_ERR "%s: Transmit while link is down!\n",
  522. dev->name);
  523. netif_stop_queue(dev);
  524. return NETDEV_TX_BUSY;
  525. }
  526. if (data->txfree < MAX_SKB_FRAGS + 1) {
  527. netif_stop_queue(dev);
  528. if (net_ratelimit())
  529. printk(KERN_ERR "%s: Transmit with full tx ring!\n",
  530. dev->name);
  531. return NETDEV_TX_BUSY;
  532. }
  533. if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
  534. netif_stop_queue(dev);
  535. }
  536. spin_lock_irq(&data->txlock);
  537. for (i = 0; i < frags; i++) {
  538. int misc = 0;
  539. int tx = data->txhead;
  540. /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
  541. * the interrupt bit. TX descriptor-complete interrupts are
  542. * enabled when the queue fills up, and masked when there is
  543. * still free space. This way, when saturating the outbound
  544. * link, the tx interrupts are kept to a reasonable level.
  545. * When the queue is not full, reclamation of skbs still occurs
  546. * as new packets are transmitted, or on a queue-empty
  547. * interrupt.
  548. */
  549. if ((tx % TSI108_TX_INT_FREQ == 0) &&
  550. ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
  551. misc = TSI108_TX_INT;
  552. data->txskbs[tx] = skb;
  553. if (i == 0) {
  554. data->txring[tx].buf0 = dma_map_single(&data->pdev->dev,
  555. skb->data, skb_headlen(skb),
  556. DMA_TO_DEVICE);
  557. data->txring[tx].len = skb_headlen(skb);
  558. misc |= TSI108_TX_SOF;
  559. } else {
  560. const skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
  561. data->txring[tx].buf0 =
  562. skb_frag_dma_map(&data->pdev->dev, frag,
  563. 0, skb_frag_size(frag),
  564. DMA_TO_DEVICE);
  565. data->txring[tx].len = skb_frag_size(frag);
  566. }
  567. if (i == frags - 1)
  568. misc |= TSI108_TX_EOF;
  569. if (netif_msg_pktdata(data)) {
  570. int i;
  571. printk("%s: Tx Frame contents (%d)\n", dev->name,
  572. skb->len);
  573. for (i = 0; i < skb->len; i++)
  574. printk(" %2.2x", skb->data[i]);
  575. printk(".\n");
  576. }
  577. data->txring[tx].misc = misc | TSI108_TX_OWN;
  578. data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
  579. data->txfree--;
  580. }
  581. tsi108_complete_tx(dev);
  582. /* This must be done after the check for completed tx descriptors,
  583. * so that the tail pointer is correct.
  584. */
  585. if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
  586. tsi108_restart_tx(data);
  587. spin_unlock_irq(&data->txlock);
  588. return NETDEV_TX_OK;
  589. }
  590. static int tsi108_complete_rx(struct net_device *dev, int budget)
  591. {
  592. struct tsi108_prv_data *data = netdev_priv(dev);
  593. int done = 0;
  594. while (data->rxfree && done != budget) {
  595. int rx = data->rxtail;
  596. struct sk_buff *skb;
  597. if (data->rxring[rx].misc & TSI108_RX_OWN)
  598. break;
  599. skb = data->rxskbs[rx];
  600. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  601. data->rxfree--;
  602. done++;
  603. if (data->rxring[rx].misc & TSI108_RX_BAD) {
  604. spin_lock_irq(&data->misclock);
  605. if (data->rxring[rx].misc & TSI108_RX_CRC)
  606. data->stats.rx_crc_errors++;
  607. if (data->rxring[rx].misc & TSI108_RX_OVER)
  608. data->stats.rx_fifo_errors++;
  609. spin_unlock_irq(&data->misclock);
  610. dev_kfree_skb_any(skb);
  611. continue;
  612. }
  613. if (netif_msg_pktdata(data)) {
  614. int i;
  615. printk("%s: Rx Frame contents (%d)\n",
  616. dev->name, data->rxring[rx].len);
  617. for (i = 0; i < data->rxring[rx].len; i++)
  618. printk(" %2.2x", skb->data[i]);
  619. printk(".\n");
  620. }
  621. skb_put(skb, data->rxring[rx].len);
  622. skb->protocol = eth_type_trans(skb, dev);
  623. netif_receive_skb(skb);
  624. }
  625. return done;
  626. }
  627. static int tsi108_refill_rx(struct net_device *dev, int budget)
  628. {
  629. struct tsi108_prv_data *data = netdev_priv(dev);
  630. int done = 0;
  631. while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
  632. int rx = data->rxhead;
  633. struct sk_buff *skb;
  634. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  635. data->rxskbs[rx] = skb;
  636. if (!skb)
  637. break;
  638. data->rxring[rx].buf0 = dma_map_single(&data->pdev->dev,
  639. skb->data, TSI108_RX_SKB_SIZE,
  640. DMA_FROM_DEVICE);
  641. /* Sometimes the hardware sets blen to zero after packet
  642. * reception, even though the manual says that it's only ever
  643. * modified by the driver.
  644. */
  645. data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
  646. data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
  647. data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
  648. data->rxfree++;
  649. done++;
  650. }
  651. if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
  652. TSI108_EC_RXSTAT_QUEUE0))
  653. tsi108_restart_rx(data, dev);
  654. return done;
  655. }
  656. static int tsi108_poll(struct napi_struct *napi, int budget)
  657. {
  658. struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
  659. struct net_device *dev = data->dev;
  660. u32 estat = TSI_READ(TSI108_EC_RXESTAT);
  661. u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
  662. int num_received = 0, num_filled = 0;
  663. intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  664. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
  665. TSI_WRITE(TSI108_EC_RXESTAT, estat);
  666. TSI_WRITE(TSI108_EC_INTSTAT, intstat);
  667. if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
  668. num_received = tsi108_complete_rx(dev, budget);
  669. /* This should normally fill no more slots than the number of
  670. * packets received in tsi108_complete_rx(). The exception
  671. * is when we previously ran out of memory for RX SKBs. In that
  672. * case, it's helpful to obey the budget, not only so that the
  673. * CPU isn't hogged, but so that memory (which may still be low)
  674. * is not hogged by one device.
  675. *
  676. * A work unit is considered to be two SKBs to allow us to catch
  677. * up when the ring has shrunk due to out-of-memory but we're
  678. * still removing the full budget's worth of packets each time.
  679. */
  680. if (data->rxfree < TSI108_RXRING_LEN)
  681. num_filled = tsi108_refill_rx(dev, budget * 2);
  682. if (intstat & TSI108_INT_RXERROR) {
  683. u32 err = TSI_READ(TSI108_EC_RXERR);
  684. TSI_WRITE(TSI108_EC_RXERR, err);
  685. if (err) {
  686. if (net_ratelimit())
  687. printk(KERN_DEBUG "%s: RX error %x\n",
  688. dev->name, err);
  689. if (!(TSI_READ(TSI108_EC_RXSTAT) &
  690. TSI108_EC_RXSTAT_QUEUE0))
  691. tsi108_restart_rx(data, dev);
  692. }
  693. }
  694. if (intstat & TSI108_INT_RXOVERRUN) {
  695. spin_lock_irq(&data->misclock);
  696. data->stats.rx_fifo_errors++;
  697. spin_unlock_irq(&data->misclock);
  698. }
  699. if (num_received < budget) {
  700. data->rxpending = 0;
  701. napi_complete_done(napi, num_received);
  702. TSI_WRITE(TSI108_EC_INTMASK,
  703. TSI_READ(TSI108_EC_INTMASK)
  704. & ~(TSI108_INT_RXQUEUE0
  705. | TSI108_INT_RXTHRESH |
  706. TSI108_INT_RXOVERRUN |
  707. TSI108_INT_RXERROR |
  708. TSI108_INT_RXWAIT));
  709. } else {
  710. data->rxpending = 1;
  711. }
  712. return num_received;
  713. }
  714. static void tsi108_rx_int(struct net_device *dev)
  715. {
  716. struct tsi108_prv_data *data = netdev_priv(dev);
  717. /* A race could cause dev to already be scheduled, so it's not an
  718. * error if that happens (and interrupts shouldn't be re-masked,
  719. * because that can cause harmful races, if poll has already
  720. * unmasked them but not cleared LINK_STATE_SCHED).
  721. *
  722. * This can happen if this code races with tsi108_poll(), which masks
  723. * the interrupts after tsi108_irq_one() read the mask, but before
  724. * napi_schedule is called. It could also happen due to calls
  725. * from tsi108_check_rxring().
  726. */
  727. if (napi_schedule_prep(&data->napi)) {
  728. /* Mask, rather than ack, the receive interrupts. The ack
  729. * will happen in tsi108_poll().
  730. */
  731. TSI_WRITE(TSI108_EC_INTMASK,
  732. TSI_READ(TSI108_EC_INTMASK) |
  733. TSI108_INT_RXQUEUE0
  734. | TSI108_INT_RXTHRESH |
  735. TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
  736. TSI108_INT_RXWAIT);
  737. __napi_schedule(&data->napi);
  738. } else {
  739. if (!netif_running(dev)) {
  740. /* This can happen if an interrupt occurs while the
  741. * interface is being brought down, as the START
  742. * bit is cleared before the stop function is called.
  743. *
  744. * In this case, the interrupts must be masked, or
  745. * they will continue indefinitely.
  746. *
  747. * There's a race here if the interface is brought down
  748. * and then up in rapid succession, as the device could
  749. * be made running after the above check and before
  750. * the masking below. This will only happen if the IRQ
  751. * thread has a lower priority than the task brining
  752. * up the interface. Fixing this race would likely
  753. * require changes in generic code.
  754. */
  755. TSI_WRITE(TSI108_EC_INTMASK,
  756. TSI_READ
  757. (TSI108_EC_INTMASK) |
  758. TSI108_INT_RXQUEUE0 |
  759. TSI108_INT_RXTHRESH |
  760. TSI108_INT_RXOVERRUN |
  761. TSI108_INT_RXERROR |
  762. TSI108_INT_RXWAIT);
  763. }
  764. }
  765. }
  766. /* If the RX ring has run out of memory, try periodically
  767. * to allocate some more, as otherwise poll would never
  768. * get called (apart from the initial end-of-queue condition).
  769. *
  770. * This is called once per second (by default) from the thread.
  771. */
  772. static void tsi108_check_rxring(struct net_device *dev)
  773. {
  774. struct tsi108_prv_data *data = netdev_priv(dev);
  775. /* A poll is scheduled, as opposed to caling tsi108_refill_rx
  776. * directly, so as to keep the receive path single-threaded
  777. * (and thus not needing a lock).
  778. */
  779. if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
  780. tsi108_rx_int(dev);
  781. }
  782. static void tsi108_tx_int(struct net_device *dev)
  783. {
  784. struct tsi108_prv_data *data = netdev_priv(dev);
  785. u32 estat = TSI_READ(TSI108_EC_TXESTAT);
  786. TSI_WRITE(TSI108_EC_TXESTAT, estat);
  787. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
  788. TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
  789. if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
  790. u32 err = TSI_READ(TSI108_EC_TXERR);
  791. TSI_WRITE(TSI108_EC_TXERR, err);
  792. if (err && net_ratelimit())
  793. printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
  794. }
  795. if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
  796. spin_lock(&data->txlock);
  797. tsi108_complete_tx(dev);
  798. spin_unlock(&data->txlock);
  799. }
  800. }
  801. static irqreturn_t tsi108_irq(int irq, void *dev_id)
  802. {
  803. struct net_device *dev = dev_id;
  804. struct tsi108_prv_data *data = netdev_priv(dev);
  805. u32 stat = TSI_READ(TSI108_EC_INTSTAT);
  806. if (!(stat & TSI108_INT_ANY))
  807. return IRQ_NONE; /* Not our interrupt */
  808. stat &= ~TSI_READ(TSI108_EC_INTMASK);
  809. if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
  810. TSI108_INT_TXERROR))
  811. tsi108_tx_int(dev);
  812. if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
  813. TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
  814. TSI108_INT_RXERROR))
  815. tsi108_rx_int(dev);
  816. if (stat & TSI108_INT_SFN) {
  817. if (net_ratelimit())
  818. printk(KERN_DEBUG "%s: SFN error\n", dev->name);
  819. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
  820. }
  821. if (stat & TSI108_INT_STATCARRY) {
  822. tsi108_stat_carry(dev);
  823. TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
  824. }
  825. return IRQ_HANDLED;
  826. }
  827. static void tsi108_stop_ethernet(struct net_device *dev)
  828. {
  829. struct tsi108_prv_data *data = netdev_priv(dev);
  830. int i = 1000;
  831. /* Disable all TX and RX queues ... */
  832. TSI_WRITE(TSI108_EC_TXCTRL, 0);
  833. TSI_WRITE(TSI108_EC_RXCTRL, 0);
  834. /* ...and wait for them to become idle */
  835. while(i--) {
  836. if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
  837. break;
  838. udelay(10);
  839. }
  840. i = 1000;
  841. while(i--){
  842. if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
  843. return;
  844. udelay(10);
  845. }
  846. printk(KERN_ERR "%s function time out\n", __func__);
  847. }
  848. static void tsi108_reset_ether(struct tsi108_prv_data * data)
  849. {
  850. TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
  851. udelay(100);
  852. TSI_WRITE(TSI108_MAC_CFG1, 0);
  853. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
  854. udelay(100);
  855. TSI_WRITE(TSI108_EC_PORTCTRL,
  856. TSI_READ(TSI108_EC_PORTCTRL) &
  857. ~TSI108_EC_PORTCTRL_STATRST);
  858. TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
  859. udelay(100);
  860. TSI_WRITE(TSI108_EC_TXCFG,
  861. TSI_READ(TSI108_EC_TXCFG) &
  862. ~TSI108_EC_TXCFG_RST);
  863. TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
  864. udelay(100);
  865. TSI_WRITE(TSI108_EC_RXCFG,
  866. TSI_READ(TSI108_EC_RXCFG) &
  867. ~TSI108_EC_RXCFG_RST);
  868. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  869. TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
  870. TSI108_MAC_MII_MGMT_RST);
  871. udelay(100);
  872. TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
  873. (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
  874. ~(TSI108_MAC_MII_MGMT_RST |
  875. TSI108_MAC_MII_MGMT_CLK)) | 0x07);
  876. }
  877. static int tsi108_get_mac(struct net_device *dev)
  878. {
  879. struct tsi108_prv_data *data = netdev_priv(dev);
  880. u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
  881. u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
  882. /* Note that the octets are reversed from what the manual says,
  883. * producing an even weirder ordering...
  884. */
  885. if (word2 == 0 && word1 == 0) {
  886. dev->dev_addr[0] = 0x00;
  887. dev->dev_addr[1] = 0x06;
  888. dev->dev_addr[2] = 0xd2;
  889. dev->dev_addr[3] = 0x00;
  890. dev->dev_addr[4] = 0x00;
  891. if (0x8 == data->phy)
  892. dev->dev_addr[5] = 0x01;
  893. else
  894. dev->dev_addr[5] = 0x02;
  895. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  896. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  897. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  898. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  899. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  900. } else {
  901. dev->dev_addr[0] = (word2 >> 16) & 0xff;
  902. dev->dev_addr[1] = (word2 >> 24) & 0xff;
  903. dev->dev_addr[2] = (word1 >> 0) & 0xff;
  904. dev->dev_addr[3] = (word1 >> 8) & 0xff;
  905. dev->dev_addr[4] = (word1 >> 16) & 0xff;
  906. dev->dev_addr[5] = (word1 >> 24) & 0xff;
  907. }
  908. if (!is_valid_ether_addr(dev->dev_addr)) {
  909. printk(KERN_ERR
  910. "%s: Invalid MAC address. word1: %08x, word2: %08x\n",
  911. dev->name, word1, word2);
  912. return -EINVAL;
  913. }
  914. return 0;
  915. }
  916. static int tsi108_set_mac(struct net_device *dev, void *addr)
  917. {
  918. struct tsi108_prv_data *data = netdev_priv(dev);
  919. u32 word1, word2;
  920. int i;
  921. if (!is_valid_ether_addr(addr))
  922. return -EADDRNOTAVAIL;
  923. for (i = 0; i < 6; i++)
  924. /* +2 is for the offset of the HW addr type */
  925. dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
  926. word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
  927. word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
  928. (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
  929. spin_lock_irq(&data->misclock);
  930. TSI_WRITE(TSI108_MAC_ADDR1, word1);
  931. TSI_WRITE(TSI108_MAC_ADDR2, word2);
  932. spin_lock(&data->txlock);
  933. if (data->txfree && data->link_up)
  934. netif_wake_queue(dev);
  935. spin_unlock(&data->txlock);
  936. spin_unlock_irq(&data->misclock);
  937. return 0;
  938. }
  939. /* Protected by dev->xmit_lock. */
  940. static void tsi108_set_rx_mode(struct net_device *dev)
  941. {
  942. struct tsi108_prv_data *data = netdev_priv(dev);
  943. u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
  944. if (dev->flags & IFF_PROMISC) {
  945. rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
  946. rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
  947. goto out;
  948. }
  949. rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
  950. if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
  951. int i;
  952. struct netdev_hw_addr *ha;
  953. rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
  954. memset(data->mc_hash, 0, sizeof(data->mc_hash));
  955. netdev_for_each_mc_addr(ha, dev) {
  956. u32 hash, crc;
  957. crc = ether_crc(6, ha->addr);
  958. hash = crc >> 23;
  959. __set_bit(hash, &data->mc_hash[0]);
  960. }
  961. TSI_WRITE(TSI108_EC_HASHADDR,
  962. TSI108_EC_HASHADDR_AUTOINC |
  963. TSI108_EC_HASHADDR_MCAST);
  964. for (i = 0; i < 16; i++) {
  965. /* The manual says that the hardware may drop
  966. * back-to-back writes to the data register.
  967. */
  968. udelay(1);
  969. TSI_WRITE(TSI108_EC_HASHDATA,
  970. data->mc_hash[i]);
  971. }
  972. }
  973. out:
  974. TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
  975. }
  976. static void tsi108_init_phy(struct net_device *dev)
  977. {
  978. struct tsi108_prv_data *data = netdev_priv(dev);
  979. u32 i = 0;
  980. u16 phyval = 0;
  981. unsigned long flags;
  982. spin_lock_irqsave(&phy_lock, flags);
  983. tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
  984. while (--i) {
  985. if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
  986. break;
  987. udelay(10);
  988. }
  989. if (i == 0)
  990. printk(KERN_ERR "%s function time out\n", __func__);
  991. if (data->phy_type == TSI108_PHY_BCM54XX) {
  992. tsi108_write_mii(data, 0x09, 0x0300);
  993. tsi108_write_mii(data, 0x10, 0x1020);
  994. tsi108_write_mii(data, 0x1c, 0x8c00);
  995. }
  996. tsi108_write_mii(data,
  997. MII_BMCR,
  998. BMCR_ANENABLE | BMCR_ANRESTART);
  999. while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
  1000. cpu_relax();
  1001. /* Set G/MII mode and receive clock select in TBI control #2. The
  1002. * second port won't work if this isn't done, even though we don't
  1003. * use TBI mode.
  1004. */
  1005. tsi108_write_tbi(data, 0x11, 0x30);
  1006. /* FIXME: It seems to take more than 2 back-to-back reads to the
  1007. * PHY_STAT register before the link up status bit is set.
  1008. */
  1009. data->link_up = 0;
  1010. while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
  1011. BMSR_LSTATUS)) {
  1012. if (i++ > (MII_READ_DELAY / 10)) {
  1013. break;
  1014. }
  1015. spin_unlock_irqrestore(&phy_lock, flags);
  1016. msleep(10);
  1017. spin_lock_irqsave(&phy_lock, flags);
  1018. }
  1019. data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
  1020. printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
  1021. data->phy_ok = 1;
  1022. data->init_media = 1;
  1023. spin_unlock_irqrestore(&phy_lock, flags);
  1024. }
  1025. static void tsi108_kill_phy(struct net_device *dev)
  1026. {
  1027. struct tsi108_prv_data *data = netdev_priv(dev);
  1028. unsigned long flags;
  1029. spin_lock_irqsave(&phy_lock, flags);
  1030. tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
  1031. data->phy_ok = 0;
  1032. spin_unlock_irqrestore(&phy_lock, flags);
  1033. }
  1034. static int tsi108_open(struct net_device *dev)
  1035. {
  1036. int i;
  1037. struct tsi108_prv_data *data = netdev_priv(dev);
  1038. unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
  1039. unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
  1040. i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
  1041. if (i != 0) {
  1042. printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
  1043. data->id, data->irq_num);
  1044. return i;
  1045. } else {
  1046. dev->irq = data->irq_num;
  1047. printk(KERN_NOTICE
  1048. "tsi108_open : Port %d Assigned IRQ %d to %s\n",
  1049. data->id, dev->irq, dev->name);
  1050. }
  1051. data->rxring = dma_zalloc_coherent(&data->pdev->dev, rxring_size,
  1052. &data->rxdma, GFP_KERNEL);
  1053. if (!data->rxring)
  1054. return -ENOMEM;
  1055. data->txring = dma_zalloc_coherent(&data->pdev->dev, txring_size,
  1056. &data->txdma, GFP_KERNEL);
  1057. if (!data->txring) {
  1058. dma_free_coherent(&data->pdev->dev, rxring_size, data->rxring,
  1059. data->rxdma);
  1060. return -ENOMEM;
  1061. }
  1062. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1063. data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
  1064. data->rxring[i].blen = TSI108_RXBUF_SIZE;
  1065. data->rxring[i].vlan = 0;
  1066. }
  1067. data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
  1068. data->rxtail = 0;
  1069. data->rxhead = 0;
  1070. for (i = 0; i < TSI108_RXRING_LEN; i++) {
  1071. struct sk_buff *skb;
  1072. skb = netdev_alloc_skb_ip_align(dev, TSI108_RXBUF_SIZE);
  1073. if (!skb) {
  1074. /* Bah. No memory for now, but maybe we'll get
  1075. * some more later.
  1076. * For now, we'll live with the smaller ring.
  1077. */
  1078. printk(KERN_WARNING
  1079. "%s: Could only allocate %d receive skb(s).\n",
  1080. dev->name, i);
  1081. data->rxhead = i;
  1082. break;
  1083. }
  1084. data->rxskbs[i] = skb;
  1085. data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
  1086. data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
  1087. }
  1088. data->rxfree = i;
  1089. TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
  1090. for (i = 0; i < TSI108_TXRING_LEN; i++) {
  1091. data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
  1092. data->txring[i].misc = 0;
  1093. }
  1094. data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
  1095. data->txtail = 0;
  1096. data->txhead = 0;
  1097. data->txfree = TSI108_TXRING_LEN;
  1098. TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
  1099. tsi108_init_phy(dev);
  1100. napi_enable(&data->napi);
  1101. timer_setup(&data->timer, tsi108_timed_checker, 0);
  1102. mod_timer(&data->timer, jiffies + 1);
  1103. tsi108_restart_rx(data, dev);
  1104. TSI_WRITE(TSI108_EC_INTSTAT, ~0);
  1105. TSI_WRITE(TSI108_EC_INTMASK,
  1106. ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
  1107. TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
  1108. TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
  1109. TSI108_INT_SFN | TSI108_INT_STATCARRY));
  1110. TSI_WRITE(TSI108_MAC_CFG1,
  1111. TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
  1112. netif_start_queue(dev);
  1113. return 0;
  1114. }
  1115. static int tsi108_close(struct net_device *dev)
  1116. {
  1117. struct tsi108_prv_data *data = netdev_priv(dev);
  1118. netif_stop_queue(dev);
  1119. napi_disable(&data->napi);
  1120. del_timer_sync(&data->timer);
  1121. tsi108_stop_ethernet(dev);
  1122. tsi108_kill_phy(dev);
  1123. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1124. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1125. /* Check for any pending TX packets, and drop them. */
  1126. while (!data->txfree || data->txhead != data->txtail) {
  1127. int tx = data->txtail;
  1128. struct sk_buff *skb;
  1129. skb = data->txskbs[tx];
  1130. data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
  1131. data->txfree++;
  1132. dev_kfree_skb(skb);
  1133. }
  1134. free_irq(data->irq_num, dev);
  1135. /* Discard the RX ring. */
  1136. while (data->rxfree) {
  1137. int rx = data->rxtail;
  1138. struct sk_buff *skb;
  1139. skb = data->rxskbs[rx];
  1140. data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
  1141. data->rxfree--;
  1142. dev_kfree_skb(skb);
  1143. }
  1144. dma_free_coherent(&data->pdev->dev,
  1145. TSI108_RXRING_LEN * sizeof(rx_desc),
  1146. data->rxring, data->rxdma);
  1147. dma_free_coherent(&data->pdev->dev,
  1148. TSI108_TXRING_LEN * sizeof(tx_desc),
  1149. data->txring, data->txdma);
  1150. return 0;
  1151. }
  1152. static void tsi108_init_mac(struct net_device *dev)
  1153. {
  1154. struct tsi108_prv_data *data = netdev_priv(dev);
  1155. TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
  1156. TSI108_MAC_CFG2_PADCRC);
  1157. TSI_WRITE(TSI108_EC_TXTHRESH,
  1158. (192 << TSI108_EC_TXTHRESH_STARTFILL) |
  1159. (192 << TSI108_EC_TXTHRESH_STOPFILL));
  1160. TSI_WRITE(TSI108_STAT_CARRYMASK1,
  1161. ~(TSI108_STAT_CARRY1_RXBYTES |
  1162. TSI108_STAT_CARRY1_RXPKTS |
  1163. TSI108_STAT_CARRY1_RXFCS |
  1164. TSI108_STAT_CARRY1_RXMCAST |
  1165. TSI108_STAT_CARRY1_RXALIGN |
  1166. TSI108_STAT_CARRY1_RXLENGTH |
  1167. TSI108_STAT_CARRY1_RXRUNT |
  1168. TSI108_STAT_CARRY1_RXJUMBO |
  1169. TSI108_STAT_CARRY1_RXFRAG |
  1170. TSI108_STAT_CARRY1_RXJABBER |
  1171. TSI108_STAT_CARRY1_RXDROP));
  1172. TSI_WRITE(TSI108_STAT_CARRYMASK2,
  1173. ~(TSI108_STAT_CARRY2_TXBYTES |
  1174. TSI108_STAT_CARRY2_TXPKTS |
  1175. TSI108_STAT_CARRY2_TXEXDEF |
  1176. TSI108_STAT_CARRY2_TXEXCOL |
  1177. TSI108_STAT_CARRY2_TXTCOL |
  1178. TSI108_STAT_CARRY2_TXPAUSE));
  1179. TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
  1180. TSI_WRITE(TSI108_MAC_CFG1, 0);
  1181. TSI_WRITE(TSI108_EC_RXCFG,
  1182. TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
  1183. TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
  1184. TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
  1185. TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1186. TSI108_EC_TXQ_CFG_SFNPORT));
  1187. TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
  1188. TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
  1189. TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
  1190. TSI108_EC_RXQ_CFG_SFNPORT));
  1191. TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
  1192. TSI108_EC_TXQ_BUFCFG_BURST256 |
  1193. TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1194. TSI108_EC_TXQ_BUFCFG_SFNPORT));
  1195. TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
  1196. TSI108_EC_RXQ_BUFCFG_BURST256 |
  1197. TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
  1198. TSI108_EC_RXQ_BUFCFG_SFNPORT));
  1199. TSI_WRITE(TSI108_EC_INTMASK, ~0);
  1200. }
  1201. static int tsi108_get_link_ksettings(struct net_device *dev,
  1202. struct ethtool_link_ksettings *cmd)
  1203. {
  1204. struct tsi108_prv_data *data = netdev_priv(dev);
  1205. unsigned long flags;
  1206. spin_lock_irqsave(&data->txlock, flags);
  1207. mii_ethtool_get_link_ksettings(&data->mii_if, cmd);
  1208. spin_unlock_irqrestore(&data->txlock, flags);
  1209. return 0;
  1210. }
  1211. static int tsi108_set_link_ksettings(struct net_device *dev,
  1212. const struct ethtool_link_ksettings *cmd)
  1213. {
  1214. struct tsi108_prv_data *data = netdev_priv(dev);
  1215. unsigned long flags;
  1216. int rc;
  1217. spin_lock_irqsave(&data->txlock, flags);
  1218. rc = mii_ethtool_set_link_ksettings(&data->mii_if, cmd);
  1219. spin_unlock_irqrestore(&data->txlock, flags);
  1220. return rc;
  1221. }
  1222. static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1223. {
  1224. struct tsi108_prv_data *data = netdev_priv(dev);
  1225. if (!netif_running(dev))
  1226. return -EINVAL;
  1227. return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
  1228. }
  1229. static const struct ethtool_ops tsi108_ethtool_ops = {
  1230. .get_link = ethtool_op_get_link,
  1231. .get_link_ksettings = tsi108_get_link_ksettings,
  1232. .set_link_ksettings = tsi108_set_link_ksettings,
  1233. };
  1234. static const struct net_device_ops tsi108_netdev_ops = {
  1235. .ndo_open = tsi108_open,
  1236. .ndo_stop = tsi108_close,
  1237. .ndo_start_xmit = tsi108_send_packet,
  1238. .ndo_set_rx_mode = tsi108_set_rx_mode,
  1239. .ndo_get_stats = tsi108_get_stats,
  1240. .ndo_do_ioctl = tsi108_do_ioctl,
  1241. .ndo_set_mac_address = tsi108_set_mac,
  1242. .ndo_validate_addr = eth_validate_addr,
  1243. };
  1244. static int
  1245. tsi108_init_one(struct platform_device *pdev)
  1246. {
  1247. struct net_device *dev = NULL;
  1248. struct tsi108_prv_data *data = NULL;
  1249. hw_info *einfo;
  1250. int err = 0;
  1251. einfo = dev_get_platdata(&pdev->dev);
  1252. if (NULL == einfo) {
  1253. printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
  1254. pdev->id);
  1255. return -ENODEV;
  1256. }
  1257. /* Create an ethernet device instance */
  1258. dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
  1259. if (!dev)
  1260. return -ENOMEM;
  1261. printk("tsi108_eth%d: probe...\n", pdev->id);
  1262. data = netdev_priv(dev);
  1263. data->dev = dev;
  1264. data->pdev = pdev;
  1265. pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
  1266. pdev->id, einfo->regs, einfo->phyregs,
  1267. einfo->phy, einfo->irq_num);
  1268. data->regs = ioremap(einfo->regs, 0x400);
  1269. if (NULL == data->regs) {
  1270. err = -ENOMEM;
  1271. goto regs_fail;
  1272. }
  1273. data->phyregs = ioremap(einfo->phyregs, 0x400);
  1274. if (NULL == data->phyregs) {
  1275. err = -ENOMEM;
  1276. goto phyregs_fail;
  1277. }
  1278. /* MII setup */
  1279. data->mii_if.dev = dev;
  1280. data->mii_if.mdio_read = tsi108_mdio_read;
  1281. data->mii_if.mdio_write = tsi108_mdio_write;
  1282. data->mii_if.phy_id = einfo->phy;
  1283. data->mii_if.phy_id_mask = 0x1f;
  1284. data->mii_if.reg_num_mask = 0x1f;
  1285. data->phy = einfo->phy;
  1286. data->phy_type = einfo->phy_type;
  1287. data->irq_num = einfo->irq_num;
  1288. data->id = pdev->id;
  1289. netif_napi_add(dev, &data->napi, tsi108_poll, 64);
  1290. dev->netdev_ops = &tsi108_netdev_ops;
  1291. dev->ethtool_ops = &tsi108_ethtool_ops;
  1292. /* Apparently, the Linux networking code won't use scatter-gather
  1293. * if the hardware doesn't do checksums. However, it's faster
  1294. * to checksum in place and use SG, as (among other reasons)
  1295. * the cache won't be dirtied (which then has to be flushed
  1296. * before DMA). The checksumming is done by the driver (via
  1297. * a new function skb_csum_dev() in net/core/skbuff.c).
  1298. */
  1299. dev->features = NETIF_F_HIGHDMA;
  1300. spin_lock_init(&data->txlock);
  1301. spin_lock_init(&data->misclock);
  1302. tsi108_reset_ether(data);
  1303. tsi108_kill_phy(dev);
  1304. if ((err = tsi108_get_mac(dev)) != 0) {
  1305. printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
  1306. dev->name);
  1307. goto register_fail;
  1308. }
  1309. tsi108_init_mac(dev);
  1310. err = register_netdev(dev);
  1311. if (err) {
  1312. printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
  1313. dev->name);
  1314. goto register_fail;
  1315. }
  1316. platform_set_drvdata(pdev, dev);
  1317. printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %pM\n",
  1318. dev->name, dev->dev_addr);
  1319. #ifdef DEBUG
  1320. data->msg_enable = DEBUG;
  1321. dump_eth_one(dev);
  1322. #endif
  1323. return 0;
  1324. register_fail:
  1325. iounmap(data->phyregs);
  1326. phyregs_fail:
  1327. iounmap(data->regs);
  1328. regs_fail:
  1329. free_netdev(dev);
  1330. return err;
  1331. }
  1332. /* There's no way to either get interrupts from the PHY when
  1333. * something changes, or to have the Tsi108 automatically communicate
  1334. * with the PHY to reconfigure itself.
  1335. *
  1336. * Thus, we have to do it using a timer.
  1337. */
  1338. static void tsi108_timed_checker(struct timer_list *t)
  1339. {
  1340. struct tsi108_prv_data *data = from_timer(data, t, timer);
  1341. struct net_device *dev = data->dev;
  1342. tsi108_check_phy(dev);
  1343. tsi108_check_rxring(dev);
  1344. mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
  1345. }
  1346. static int tsi108_ether_remove(struct platform_device *pdev)
  1347. {
  1348. struct net_device *dev = platform_get_drvdata(pdev);
  1349. struct tsi108_prv_data *priv = netdev_priv(dev);
  1350. unregister_netdev(dev);
  1351. tsi108_stop_ethernet(dev);
  1352. iounmap(priv->regs);
  1353. iounmap(priv->phyregs);
  1354. free_netdev(dev);
  1355. return 0;
  1356. }
  1357. module_platform_driver(tsi_eth_driver);
  1358. MODULE_AUTHOR("Tundra Semiconductor Corporation");
  1359. MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
  1360. MODULE_LICENSE("GPL");
  1361. MODULE_ALIAS("platform:tsi-ethernet");