pinctrl-exynos.h 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
  4. *
  5. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  6. * http://www.samsung.com
  7. * Copyright (c) 2012 Linaro Ltd
  8. * http://www.linaro.org
  9. *
  10. * This file contains the Exynos specific definitions for the Samsung
  11. * pinctrl/gpiolib interface drivers.
  12. *
  13. * Author: Thomas Abraham <thomas.ab@samsung.com>
  14. */
  15. #ifndef __PINCTRL_SAMSUNG_EXYNOS_H
  16. #define __PINCTRL_SAMSUNG_EXYNOS_H
  17. /* External GPIO and wakeup interrupt related definitions */
  18. #define EXYNOS_GPIO_ECON_OFFSET 0x700
  19. #define EXYNOS_GPIO_EFLTCON_OFFSET 0x800
  20. #define EXYNOS_GPIO_EMASK_OFFSET 0x900
  21. #define EXYNOS_GPIO_EPEND_OFFSET 0xA00
  22. #define EXYNOS_WKUP_ECON_OFFSET 0xE00
  23. #define EXYNOS_WKUP_EMASK_OFFSET 0xF00
  24. #define EXYNOS_WKUP_EPEND_OFFSET 0xF40
  25. #define EXYNOS7_WKUP_ECON_OFFSET 0x700
  26. #define EXYNOS7_WKUP_EMASK_OFFSET 0x900
  27. #define EXYNOS7_WKUP_EPEND_OFFSET 0xA00
  28. #define EXYNOS_SVC_OFFSET 0xB08
  29. /* helpers to access interrupt service register */
  30. #define EXYNOS_SVC_GROUP_SHIFT 3
  31. #define EXYNOS_SVC_GROUP_MASK 0x1f
  32. #define EXYNOS_SVC_NUM_MASK 7
  33. #define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \
  34. EXYNOS_SVC_GROUP_MASK)
  35. /* Exynos specific external interrupt trigger types */
  36. #define EXYNOS_EINT_LEVEL_LOW 0
  37. #define EXYNOS_EINT_LEVEL_HIGH 1
  38. #define EXYNOS_EINT_EDGE_FALLING 2
  39. #define EXYNOS_EINT_EDGE_RISING 3
  40. #define EXYNOS_EINT_EDGE_BOTH 4
  41. #define EXYNOS_EINT_CON_MASK 0xF
  42. #define EXYNOS_EINT_CON_LEN 4
  43. #define EXYNOS_EINT_MAX_PER_BANK 8
  44. #define EXYNOS_EINT_NR_WKUP_EINT
  45. #define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
  46. { \
  47. .type = &bank_type_off, \
  48. .pctl_offset = reg, \
  49. .nr_pins = pins, \
  50. .eint_type = EINT_TYPE_NONE, \
  51. .name = id \
  52. }
  53. #define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
  54. { \
  55. .type = &bank_type_off, \
  56. .pctl_offset = reg, \
  57. .nr_pins = pins, \
  58. .eint_type = EINT_TYPE_GPIO, \
  59. .eint_offset = offs, \
  60. .name = id \
  61. }
  62. #define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
  63. { \
  64. .type = &bank_type_alive, \
  65. .pctl_offset = reg, \
  66. .nr_pins = pins, \
  67. .eint_type = EINT_TYPE_WKUP, \
  68. .eint_offset = offs, \
  69. .name = id \
  70. }
  71. #define EXYNOS5433_PIN_BANK_EINTG(pins, reg, id, offs) \
  72. { \
  73. .type = &exynos5433_bank_type_off, \
  74. .pctl_offset = reg, \
  75. .nr_pins = pins, \
  76. .eint_type = EINT_TYPE_GPIO, \
  77. .eint_offset = offs, \
  78. .name = id \
  79. }
  80. #define EXYNOS5433_PIN_BANK_EINTW(pins, reg, id, offs) \
  81. { \
  82. .type = &exynos5433_bank_type_alive, \
  83. .pctl_offset = reg, \
  84. .nr_pins = pins, \
  85. .eint_type = EINT_TYPE_WKUP, \
  86. .eint_offset = offs, \
  87. .name = id \
  88. }
  89. #define EXYNOS5433_PIN_BANK_EINTW_EXT(pins, reg, id, offs, pctl_idx) \
  90. { \
  91. .type = &exynos5433_bank_type_off, \
  92. .pctl_offset = reg, \
  93. .nr_pins = pins, \
  94. .eint_type = EINT_TYPE_WKUP, \
  95. .eint_offset = offs, \
  96. .name = id, \
  97. .pctl_res_idx = pctl_idx, \
  98. } \
  99. /**
  100. * struct exynos_weint_data: irq specific data for all the wakeup interrupts
  101. * generated by the external wakeup interrupt controller.
  102. * @irq: interrupt number within the domain.
  103. * @bank: bank responsible for this interrupt
  104. */
  105. struct exynos_weint_data {
  106. unsigned int irq;
  107. struct samsung_pin_bank *bank;
  108. };
  109. /**
  110. * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
  111. * generated by the external wakeup interrupt controller.
  112. * @nr_banks: count of banks being part of the mux
  113. * @banks: array of banks being part of the mux
  114. */
  115. struct exynos_muxed_weint_data {
  116. unsigned int nr_banks;
  117. struct samsung_pin_bank *banks[];
  118. };
  119. int exynos_eint_gpio_init(struct samsung_pinctrl_drv_data *d);
  120. int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d);
  121. void exynos_pinctrl_suspend(struct samsung_pinctrl_drv_data *drvdata);
  122. void exynos_pinctrl_resume(struct samsung_pinctrl_drv_data *drvdata);
  123. struct samsung_retention_ctrl *
  124. exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata,
  125. const struct samsung_retention_data *data);
  126. #endif /* __PINCTRL_SAMSUNG_EXYNOS_H */