mt2701-cs42448.c 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * mt2701-cs42448.c -- MT2701 CS42448 ALSA SoC machine driver
  4. *
  5. * Copyright (c) 2016 MediaTek Inc.
  6. * Author: Ir Lian <ir.lian@mediatek.com>
  7. * Garlic Tseng <garlic.tseng@mediatek.com>
  8. */
  9. #include <linux/module.h>
  10. #include <sound/soc.h>
  11. #include <linux/delay.h>
  12. #include <linux/gpio.h>
  13. #include <linux/pinctrl/consumer.h>
  14. #include <linux/of_gpio.h>
  15. #include "mt2701-afe-common.h"
  16. struct mt2701_cs42448_private {
  17. int i2s1_in_mux;
  18. int i2s1_in_mux_gpio_sel_1;
  19. int i2s1_in_mux_gpio_sel_2;
  20. };
  21. static const char * const i2sin_mux_switch_text[] = {
  22. "ADC_SDOUT2",
  23. "ADC_SDOUT3",
  24. "I2S_IN_1",
  25. "I2S_IN_2",
  26. };
  27. static const struct soc_enum i2sin_mux_enum =
  28. SOC_ENUM_SINGLE_EXT(4, i2sin_mux_switch_text);
  29. static int mt2701_cs42448_i2sin1_mux_get(struct snd_kcontrol *kcontrol,
  30. struct snd_ctl_elem_value *ucontrol)
  31. {
  32. struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
  33. struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);
  34. ucontrol->value.integer.value[0] = priv->i2s1_in_mux;
  35. return 0;
  36. }
  37. static int mt2701_cs42448_i2sin1_mux_set(struct snd_kcontrol *kcontrol,
  38. struct snd_ctl_elem_value *ucontrol)
  39. {
  40. struct snd_soc_card *card = snd_kcontrol_chip(kcontrol);
  41. struct mt2701_cs42448_private *priv = snd_soc_card_get_drvdata(card);
  42. if (ucontrol->value.integer.value[0] == priv->i2s1_in_mux)
  43. return 0;
  44. switch (ucontrol->value.integer.value[0]) {
  45. case 0:
  46. gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 0);
  47. gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 0);
  48. break;
  49. case 1:
  50. gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 1);
  51. gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 0);
  52. break;
  53. case 2:
  54. gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 0);
  55. gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 1);
  56. break;
  57. case 3:
  58. gpio_set_value(priv->i2s1_in_mux_gpio_sel_1, 1);
  59. gpio_set_value(priv->i2s1_in_mux_gpio_sel_2, 1);
  60. break;
  61. default:
  62. dev_warn(card->dev, "%s invalid setting\n", __func__);
  63. }
  64. priv->i2s1_in_mux = ucontrol->value.integer.value[0];
  65. return 0;
  66. }
  67. static const struct snd_soc_dapm_widget
  68. mt2701_cs42448_asoc_card_dapm_widgets[] = {
  69. SND_SOC_DAPM_LINE("Line Out Jack", NULL),
  70. SND_SOC_DAPM_MIC("AMIC", NULL),
  71. SND_SOC_DAPM_LINE("Tuner In", NULL),
  72. SND_SOC_DAPM_LINE("Satellite Tuner In", NULL),
  73. SND_SOC_DAPM_LINE("AUX In", NULL),
  74. };
  75. static const struct snd_kcontrol_new mt2701_cs42448_controls[] = {
  76. SOC_DAPM_PIN_SWITCH("Line Out Jack"),
  77. SOC_DAPM_PIN_SWITCH("AMIC"),
  78. SOC_DAPM_PIN_SWITCH("Tuner In"),
  79. SOC_DAPM_PIN_SWITCH("Satellite Tuner In"),
  80. SOC_DAPM_PIN_SWITCH("AUX In"),
  81. SOC_ENUM_EXT("I2SIN1_MUX_Switch", i2sin_mux_enum,
  82. mt2701_cs42448_i2sin1_mux_get,
  83. mt2701_cs42448_i2sin1_mux_set),
  84. };
  85. static const unsigned int mt2701_cs42448_sampling_rates[] = {48000};
  86. static const struct snd_pcm_hw_constraint_list mt2701_cs42448_constraints_rates = {
  87. .count = ARRAY_SIZE(mt2701_cs42448_sampling_rates),
  88. .list = mt2701_cs42448_sampling_rates,
  89. .mask = 0,
  90. };
  91. static int mt2701_cs42448_fe_ops_startup(struct snd_pcm_substream *substream)
  92. {
  93. int err;
  94. err = snd_pcm_hw_constraint_list(substream->runtime, 0,
  95. SNDRV_PCM_HW_PARAM_RATE,
  96. &mt2701_cs42448_constraints_rates);
  97. if (err < 0) {
  98. dev_err(substream->pcm->card->dev,
  99. "%s snd_pcm_hw_constraint_list failed: 0x%x\n",
  100. __func__, err);
  101. return err;
  102. }
  103. return 0;
  104. }
  105. static const struct snd_soc_ops mt2701_cs42448_48k_fe_ops = {
  106. .startup = mt2701_cs42448_fe_ops_startup,
  107. };
  108. static int mt2701_cs42448_be_ops_hw_params(struct snd_pcm_substream *substream,
  109. struct snd_pcm_hw_params *params)
  110. {
  111. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  112. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  113. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  114. unsigned int mclk_rate;
  115. unsigned int rate = params_rate(params);
  116. unsigned int div_mclk_over_bck = rate > 192000 ? 2 : 4;
  117. unsigned int div_bck_over_lrck = 64;
  118. mclk_rate = rate * div_bck_over_lrck * div_mclk_over_bck;
  119. /* mt2701 mclk */
  120. snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_rate, SND_SOC_CLOCK_OUT);
  121. /* codec mclk */
  122. snd_soc_dai_set_sysclk(codec_dai, 0, mclk_rate, SND_SOC_CLOCK_IN);
  123. return 0;
  124. }
  125. static struct snd_soc_ops mt2701_cs42448_be_ops = {
  126. .hw_params = mt2701_cs42448_be_ops_hw_params
  127. };
  128. enum {
  129. DAI_LINK_FE_MULTI_CH_OUT,
  130. DAI_LINK_FE_PCM0_IN,
  131. DAI_LINK_FE_PCM1_IN,
  132. DAI_LINK_FE_BT_OUT,
  133. DAI_LINK_FE_BT_IN,
  134. DAI_LINK_BE_I2S0,
  135. DAI_LINK_BE_I2S1,
  136. DAI_LINK_BE_I2S2,
  137. DAI_LINK_BE_I2S3,
  138. DAI_LINK_BE_MRG_BT,
  139. };
  140. static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = {
  141. /* FE */
  142. [DAI_LINK_FE_MULTI_CH_OUT] = {
  143. .name = "mt2701-cs42448-multi-ch-out",
  144. .stream_name = "mt2701-cs42448-multi-ch-out",
  145. .cpu_dai_name = "PCM_multi",
  146. .codec_name = "snd-soc-dummy",
  147. .codec_dai_name = "snd-soc-dummy-dai",
  148. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  149. SND_SOC_DPCM_TRIGGER_POST},
  150. .ops = &mt2701_cs42448_48k_fe_ops,
  151. .dynamic = 1,
  152. .dpcm_playback = 1,
  153. },
  154. [DAI_LINK_FE_PCM0_IN] = {
  155. .name = "mt2701-cs42448-pcm0",
  156. .stream_name = "mt2701-cs42448-pcm0-data-UL",
  157. .cpu_dai_name = "PCM0",
  158. .codec_name = "snd-soc-dummy",
  159. .codec_dai_name = "snd-soc-dummy-dai",
  160. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  161. SND_SOC_DPCM_TRIGGER_POST},
  162. .ops = &mt2701_cs42448_48k_fe_ops,
  163. .dynamic = 1,
  164. .dpcm_capture = 1,
  165. },
  166. [DAI_LINK_FE_PCM1_IN] = {
  167. .name = "mt2701-cs42448-pcm1-data-UL",
  168. .stream_name = "mt2701-cs42448-pcm1-data-UL",
  169. .cpu_dai_name = "PCM1",
  170. .codec_name = "snd-soc-dummy",
  171. .codec_dai_name = "snd-soc-dummy-dai",
  172. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  173. SND_SOC_DPCM_TRIGGER_POST},
  174. .ops = &mt2701_cs42448_48k_fe_ops,
  175. .dynamic = 1,
  176. .dpcm_capture = 1,
  177. },
  178. [DAI_LINK_FE_BT_OUT] = {
  179. .name = "mt2701-cs42448-pcm-BT-out",
  180. .stream_name = "mt2701-cs42448-pcm-BT",
  181. .cpu_dai_name = "PCM_BT_DL",
  182. .codec_name = "snd-soc-dummy",
  183. .codec_dai_name = "snd-soc-dummy-dai",
  184. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  185. SND_SOC_DPCM_TRIGGER_POST},
  186. .dynamic = 1,
  187. .dpcm_playback = 1,
  188. },
  189. [DAI_LINK_FE_BT_IN] = {
  190. .name = "mt2701-cs42448-pcm-BT-in",
  191. .stream_name = "mt2701-cs42448-pcm-BT",
  192. .cpu_dai_name = "PCM_BT_UL",
  193. .codec_name = "snd-soc-dummy",
  194. .codec_dai_name = "snd-soc-dummy-dai",
  195. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  196. SND_SOC_DPCM_TRIGGER_POST},
  197. .dynamic = 1,
  198. .dpcm_capture = 1,
  199. },
  200. /* BE */
  201. [DAI_LINK_BE_I2S0] = {
  202. .name = "mt2701-cs42448-I2S0",
  203. .cpu_dai_name = "I2S0",
  204. .no_pcm = 1,
  205. .codec_dai_name = "cs42448",
  206. .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
  207. | SND_SOC_DAIFMT_GATED,
  208. .ops = &mt2701_cs42448_be_ops,
  209. .dpcm_playback = 1,
  210. .dpcm_capture = 1,
  211. },
  212. [DAI_LINK_BE_I2S1] = {
  213. .name = "mt2701-cs42448-I2S1",
  214. .cpu_dai_name = "I2S1",
  215. .no_pcm = 1,
  216. .codec_dai_name = "cs42448",
  217. .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
  218. | SND_SOC_DAIFMT_GATED,
  219. .ops = &mt2701_cs42448_be_ops,
  220. .dpcm_playback = 1,
  221. .dpcm_capture = 1,
  222. },
  223. [DAI_LINK_BE_I2S2] = {
  224. .name = "mt2701-cs42448-I2S2",
  225. .cpu_dai_name = "I2S2",
  226. .no_pcm = 1,
  227. .codec_dai_name = "cs42448",
  228. .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
  229. | SND_SOC_DAIFMT_GATED,
  230. .ops = &mt2701_cs42448_be_ops,
  231. .dpcm_playback = 1,
  232. .dpcm_capture = 1,
  233. },
  234. [DAI_LINK_BE_I2S3] = {
  235. .name = "mt2701-cs42448-I2S3",
  236. .cpu_dai_name = "I2S3",
  237. .no_pcm = 1,
  238. .codec_dai_name = "cs42448",
  239. .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS
  240. | SND_SOC_DAIFMT_GATED,
  241. .ops = &mt2701_cs42448_be_ops,
  242. .dpcm_playback = 1,
  243. .dpcm_capture = 1,
  244. },
  245. [DAI_LINK_BE_MRG_BT] = {
  246. .name = "mt2701-cs42448-MRG-BT",
  247. .cpu_dai_name = "MRG BT",
  248. .no_pcm = 1,
  249. .codec_dai_name = "bt-sco-pcm-wb",
  250. .dpcm_playback = 1,
  251. .dpcm_capture = 1,
  252. },
  253. };
  254. static struct snd_soc_card mt2701_cs42448_soc_card = {
  255. .name = "mt2701-cs42448",
  256. .owner = THIS_MODULE,
  257. .dai_link = mt2701_cs42448_dai_links,
  258. .num_links = ARRAY_SIZE(mt2701_cs42448_dai_links),
  259. .controls = mt2701_cs42448_controls,
  260. .num_controls = ARRAY_SIZE(mt2701_cs42448_controls),
  261. .dapm_widgets = mt2701_cs42448_asoc_card_dapm_widgets,
  262. .num_dapm_widgets = ARRAY_SIZE(mt2701_cs42448_asoc_card_dapm_widgets),
  263. };
  264. static int mt2701_cs42448_machine_probe(struct platform_device *pdev)
  265. {
  266. struct snd_soc_card *card = &mt2701_cs42448_soc_card;
  267. int ret;
  268. int i;
  269. struct device_node *platform_node, *codec_node, *codec_node_bt_mrg;
  270. struct mt2701_cs42448_private *priv =
  271. devm_kzalloc(&pdev->dev, sizeof(struct mt2701_cs42448_private),
  272. GFP_KERNEL);
  273. struct device *dev = &pdev->dev;
  274. if (!priv)
  275. return -ENOMEM;
  276. platform_node = of_parse_phandle(pdev->dev.of_node,
  277. "mediatek,platform", 0);
  278. if (!platform_node) {
  279. dev_err(&pdev->dev, "Property 'platform' missing or invalid\n");
  280. return -EINVAL;
  281. }
  282. for (i = 0; i < card->num_links; i++) {
  283. if (mt2701_cs42448_dai_links[i].platform_name)
  284. continue;
  285. mt2701_cs42448_dai_links[i].platform_of_node = platform_node;
  286. }
  287. card->dev = dev;
  288. codec_node = of_parse_phandle(pdev->dev.of_node,
  289. "mediatek,audio-codec", 0);
  290. if (!codec_node) {
  291. dev_err(&pdev->dev,
  292. "Property 'audio-codec' missing or invalid\n");
  293. return -EINVAL;
  294. }
  295. for (i = 0; i < card->num_links; i++) {
  296. if (mt2701_cs42448_dai_links[i].codec_name)
  297. continue;
  298. mt2701_cs42448_dai_links[i].codec_of_node = codec_node;
  299. }
  300. codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node,
  301. "mediatek,audio-codec-bt-mrg", 0);
  302. if (!codec_node_bt_mrg) {
  303. dev_err(&pdev->dev,
  304. "Property 'audio-codec-bt-mrg' missing or invalid\n");
  305. return -EINVAL;
  306. }
  307. mt2701_cs42448_dai_links[DAI_LINK_BE_MRG_BT].codec_of_node
  308. = codec_node_bt_mrg;
  309. ret = snd_soc_of_parse_audio_routing(card, "audio-routing");
  310. if (ret) {
  311. dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret);
  312. return ret;
  313. }
  314. priv->i2s1_in_mux_gpio_sel_1 =
  315. of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio1", 0);
  316. if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_1)) {
  317. ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_1,
  318. "i2s1_in_mux_gpio_sel_1");
  319. if (ret)
  320. dev_warn(&pdev->dev, "%s devm_gpio_request fail %d\n",
  321. __func__, ret);
  322. gpio_direction_output(priv->i2s1_in_mux_gpio_sel_1, 0);
  323. }
  324. priv->i2s1_in_mux_gpio_sel_2 =
  325. of_get_named_gpio(dev->of_node, "i2s1-in-sel-gpio2", 0);
  326. if (gpio_is_valid(priv->i2s1_in_mux_gpio_sel_2)) {
  327. ret = devm_gpio_request(dev, priv->i2s1_in_mux_gpio_sel_2,
  328. "i2s1_in_mux_gpio_sel_2");
  329. if (ret)
  330. dev_warn(&pdev->dev, "%s devm_gpio_request fail2 %d\n",
  331. __func__, ret);
  332. gpio_direction_output(priv->i2s1_in_mux_gpio_sel_2, 0);
  333. }
  334. snd_soc_card_set_drvdata(card, priv);
  335. ret = devm_snd_soc_register_card(&pdev->dev, card);
  336. if (ret)
  337. dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n",
  338. __func__, ret);
  339. return ret;
  340. }
  341. #ifdef CONFIG_OF
  342. static const struct of_device_id mt2701_cs42448_machine_dt_match[] = {
  343. {.compatible = "mediatek,mt2701-cs42448-machine",},
  344. {}
  345. };
  346. #endif
  347. static struct platform_driver mt2701_cs42448_machine = {
  348. .driver = {
  349. .name = "mt2701-cs42448",
  350. #ifdef CONFIG_OF
  351. .of_match_table = mt2701_cs42448_machine_dt_match,
  352. #endif
  353. },
  354. .probe = mt2701_cs42448_machine_probe,
  355. };
  356. module_platform_driver(mt2701_cs42448_machine);
  357. /* Module information */
  358. MODULE_DESCRIPTION("MT2701 CS42448 ALSA SoC machine driver");
  359. MODULE_AUTHOR("Ir Lian <ir.lian@mediatek.com>");
  360. MODULE_LICENSE("GPL v2");
  361. MODULE_ALIAS("mt2701 cs42448 soc card");