ux500_msp_dai.c 22 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2012
  3. *
  4. * Author: Ola Lilja <ola.o.lilja@stericsson.com>,
  5. * Roger Nilsson <roger.xr.nilsson@stericsson.com>
  6. * for ST-Ericsson.
  7. *
  8. * License terms:
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as published
  12. * by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/slab.h>
  16. #include <linux/bitops.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/clk.h>
  19. #include <linux/of.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/mfd/dbx500-prcmu.h>
  22. #include <linux/platform_data/asoc-ux500-msp.h>
  23. #include <sound/soc.h>
  24. #include <sound/soc-dai.h>
  25. #include <sound/dmaengine_pcm.h>
  26. #include "ux500_msp_i2s.h"
  27. #include "ux500_msp_dai.h"
  28. #include "ux500_pcm.h"
  29. static int setup_pcm_multichan(struct snd_soc_dai *dai,
  30. struct ux500_msp_config *msp_config)
  31. {
  32. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  33. struct msp_multichannel_config *multi =
  34. &msp_config->multichannel_config;
  35. if (drvdata->slots > 1) {
  36. msp_config->multichannel_configured = 1;
  37. multi->tx_multichannel_enable = true;
  38. multi->rx_multichannel_enable = true;
  39. multi->rx_comparison_enable_mode = MSP_COMPARISON_DISABLED;
  40. multi->tx_channel_0_enable = drvdata->tx_mask;
  41. multi->tx_channel_1_enable = 0;
  42. multi->tx_channel_2_enable = 0;
  43. multi->tx_channel_3_enable = 0;
  44. multi->rx_channel_0_enable = drvdata->rx_mask;
  45. multi->rx_channel_1_enable = 0;
  46. multi->rx_channel_2_enable = 0;
  47. multi->rx_channel_3_enable = 0;
  48. dev_dbg(dai->dev,
  49. "%s: Multichannel enabled. Slots: %d, TX: %u, RX: %u\n",
  50. __func__, drvdata->slots, multi->tx_channel_0_enable,
  51. multi->rx_channel_0_enable);
  52. }
  53. return 0;
  54. }
  55. static int setup_frameper(struct snd_soc_dai *dai, unsigned int rate,
  56. struct msp_protdesc *prot_desc)
  57. {
  58. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  59. switch (drvdata->slots) {
  60. case 1:
  61. switch (rate) {
  62. case 8000:
  63. prot_desc->frame_period =
  64. FRAME_PER_SINGLE_SLOT_8_KHZ;
  65. break;
  66. case 16000:
  67. prot_desc->frame_period =
  68. FRAME_PER_SINGLE_SLOT_16_KHZ;
  69. break;
  70. case 44100:
  71. prot_desc->frame_period =
  72. FRAME_PER_SINGLE_SLOT_44_1_KHZ;
  73. break;
  74. case 48000:
  75. prot_desc->frame_period =
  76. FRAME_PER_SINGLE_SLOT_48_KHZ;
  77. break;
  78. default:
  79. dev_err(dai->dev,
  80. "%s: Error: Unsupported sample-rate (freq = %d)!\n",
  81. __func__, rate);
  82. return -EINVAL;
  83. }
  84. break;
  85. case 2:
  86. prot_desc->frame_period = FRAME_PER_2_SLOTS;
  87. break;
  88. case 8:
  89. prot_desc->frame_period = FRAME_PER_8_SLOTS;
  90. break;
  91. case 16:
  92. prot_desc->frame_period = FRAME_PER_16_SLOTS;
  93. break;
  94. default:
  95. dev_err(dai->dev,
  96. "%s: Error: Unsupported slot-count (slots = %d)!\n",
  97. __func__, drvdata->slots);
  98. return -EINVAL;
  99. }
  100. prot_desc->clocks_per_frame =
  101. prot_desc->frame_period+1;
  102. dev_dbg(dai->dev, "%s: Clocks per frame: %u\n",
  103. __func__,
  104. prot_desc->clocks_per_frame);
  105. return 0;
  106. }
  107. static int setup_pcm_framing(struct snd_soc_dai *dai, unsigned int rate,
  108. struct msp_protdesc *prot_desc)
  109. {
  110. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  111. u32 frame_length = MSP_FRAME_LEN_1;
  112. prot_desc->frame_width = 0;
  113. switch (drvdata->slots) {
  114. case 1:
  115. frame_length = MSP_FRAME_LEN_1;
  116. break;
  117. case 2:
  118. frame_length = MSP_FRAME_LEN_2;
  119. break;
  120. case 8:
  121. frame_length = MSP_FRAME_LEN_8;
  122. break;
  123. case 16:
  124. frame_length = MSP_FRAME_LEN_16;
  125. break;
  126. default:
  127. dev_err(dai->dev,
  128. "%s: Error: Unsupported slot-count (slots = %d)!\n",
  129. __func__, drvdata->slots);
  130. return -EINVAL;
  131. }
  132. prot_desc->tx_frame_len_1 = frame_length;
  133. prot_desc->rx_frame_len_1 = frame_length;
  134. prot_desc->tx_frame_len_2 = frame_length;
  135. prot_desc->rx_frame_len_2 = frame_length;
  136. prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
  137. prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
  138. prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
  139. prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
  140. return setup_frameper(dai, rate, prot_desc);
  141. }
  142. static int setup_clocking(struct snd_soc_dai *dai,
  143. unsigned int fmt,
  144. struct ux500_msp_config *msp_config)
  145. {
  146. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  147. case SND_SOC_DAIFMT_NB_NF:
  148. break;
  149. case SND_SOC_DAIFMT_NB_IF:
  150. msp_config->tx_fsync_pol ^= 1 << TFSPOL_SHIFT;
  151. msp_config->rx_fsync_pol ^= 1 << RFSPOL_SHIFT;
  152. break;
  153. default:
  154. dev_err(dai->dev,
  155. "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
  156. __func__, fmt);
  157. return -EINVAL;
  158. }
  159. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  160. case SND_SOC_DAIFMT_CBM_CFM:
  161. dev_dbg(dai->dev, "%s: Codec is master.\n", __func__);
  162. msp_config->iodelay = 0x20;
  163. msp_config->rx_fsync_sel = 0;
  164. msp_config->tx_fsync_sel = 1 << TFSSEL_SHIFT;
  165. msp_config->tx_clk_sel = 0;
  166. msp_config->rx_clk_sel = 0;
  167. msp_config->srg_clk_sel = 0x2 << SCKSEL_SHIFT;
  168. break;
  169. case SND_SOC_DAIFMT_CBS_CFS:
  170. dev_dbg(dai->dev, "%s: Codec is slave.\n", __func__);
  171. msp_config->tx_clk_sel = TX_CLK_SEL_SRG;
  172. msp_config->tx_fsync_sel = TX_SYNC_SRG_PROG;
  173. msp_config->rx_clk_sel = RX_CLK_SEL_SRG;
  174. msp_config->rx_fsync_sel = RX_SYNC_SRG;
  175. msp_config->srg_clk_sel = 1 << SCKSEL_SHIFT;
  176. break;
  177. default:
  178. dev_err(dai->dev, "%s: Error: Unsupported master (fmt = 0x%x)!\n",
  179. __func__, fmt);
  180. return -EINVAL;
  181. }
  182. return 0;
  183. }
  184. static int setup_pcm_protdesc(struct snd_soc_dai *dai,
  185. unsigned int fmt,
  186. struct msp_protdesc *prot_desc)
  187. {
  188. prot_desc->rx_phase_mode = MSP_SINGLE_PHASE;
  189. prot_desc->tx_phase_mode = MSP_SINGLE_PHASE;
  190. prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
  191. prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_IMEDIATE;
  192. prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
  193. prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
  194. prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_HI);
  195. prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_HI << RFSPOL_SHIFT;
  196. if ((fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_DSP_A) {
  197. dev_dbg(dai->dev, "%s: DSP_A.\n", __func__);
  198. prot_desc->rx_clk_pol = MSP_RISING_EDGE;
  199. prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
  200. prot_desc->rx_data_delay = MSP_DELAY_1;
  201. prot_desc->tx_data_delay = MSP_DELAY_1;
  202. } else {
  203. dev_dbg(dai->dev, "%s: DSP_B.\n", __func__);
  204. prot_desc->rx_clk_pol = MSP_FALLING_EDGE;
  205. prot_desc->tx_clk_pol = MSP_RISING_EDGE;
  206. prot_desc->rx_data_delay = MSP_DELAY_0;
  207. prot_desc->tx_data_delay = MSP_DELAY_0;
  208. }
  209. prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
  210. prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
  211. prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
  212. prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
  213. prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
  214. return 0;
  215. }
  216. static int setup_i2s_protdesc(struct msp_protdesc *prot_desc)
  217. {
  218. prot_desc->rx_phase_mode = MSP_DUAL_PHASE;
  219. prot_desc->tx_phase_mode = MSP_DUAL_PHASE;
  220. prot_desc->rx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
  221. prot_desc->tx_phase2_start_mode = MSP_PHASE2_START_MODE_FSYNC;
  222. prot_desc->rx_byte_order = MSP_BTF_MS_BIT_FIRST;
  223. prot_desc->tx_byte_order = MSP_BTF_MS_BIT_FIRST;
  224. prot_desc->tx_fsync_pol = MSP_FSYNC_POL(MSP_FSYNC_POL_ACT_LO);
  225. prot_desc->rx_fsync_pol = MSP_FSYNC_POL_ACT_LO << RFSPOL_SHIFT;
  226. prot_desc->rx_frame_len_1 = MSP_FRAME_LEN_1;
  227. prot_desc->rx_frame_len_2 = MSP_FRAME_LEN_1;
  228. prot_desc->tx_frame_len_1 = MSP_FRAME_LEN_1;
  229. prot_desc->tx_frame_len_2 = MSP_FRAME_LEN_1;
  230. prot_desc->rx_elem_len_1 = MSP_ELEM_LEN_16;
  231. prot_desc->rx_elem_len_2 = MSP_ELEM_LEN_16;
  232. prot_desc->tx_elem_len_1 = MSP_ELEM_LEN_16;
  233. prot_desc->tx_elem_len_2 = MSP_ELEM_LEN_16;
  234. prot_desc->rx_clk_pol = MSP_RISING_EDGE;
  235. prot_desc->tx_clk_pol = MSP_FALLING_EDGE;
  236. prot_desc->rx_data_delay = MSP_DELAY_0;
  237. prot_desc->tx_data_delay = MSP_DELAY_0;
  238. prot_desc->tx_half_word_swap = MSP_SWAP_NONE;
  239. prot_desc->rx_half_word_swap = MSP_SWAP_NONE;
  240. prot_desc->compression_mode = MSP_COMPRESS_MODE_LINEAR;
  241. prot_desc->expansion_mode = MSP_EXPAND_MODE_LINEAR;
  242. prot_desc->frame_sync_ignore = MSP_FSYNC_IGNORE;
  243. return 0;
  244. }
  245. static int setup_msp_config(struct snd_pcm_substream *substream,
  246. struct snd_soc_dai *dai,
  247. struct ux500_msp_config *msp_config)
  248. {
  249. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  250. struct msp_protdesc *prot_desc = &msp_config->protdesc;
  251. struct snd_pcm_runtime *runtime = substream->runtime;
  252. unsigned int fmt = drvdata->fmt;
  253. int ret;
  254. memset(msp_config, 0, sizeof(*msp_config));
  255. msp_config->f_inputclk = drvdata->master_clk;
  256. msp_config->tx_fifo_config = TX_FIFO_ENABLE;
  257. msp_config->rx_fifo_config = RX_FIFO_ENABLE;
  258. msp_config->def_elem_len = 1;
  259. msp_config->direction = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  260. MSP_DIR_TX : MSP_DIR_RX;
  261. msp_config->data_size = MSP_DATA_BITS_32;
  262. msp_config->frame_freq = runtime->rate;
  263. dev_dbg(dai->dev, "%s: f_inputclk = %u, frame_freq = %u.\n",
  264. __func__, msp_config->f_inputclk, msp_config->frame_freq);
  265. /* To avoid division by zero */
  266. prot_desc->clocks_per_frame = 1;
  267. dev_dbg(dai->dev, "%s: rate: %u, channels: %d.\n", __func__,
  268. runtime->rate, runtime->channels);
  269. switch (fmt &
  270. (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_MASTER_MASK)) {
  271. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
  272. dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
  273. msp_config->default_protdesc = 1;
  274. msp_config->protocol = MSP_I2S_PROTOCOL;
  275. break;
  276. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
  277. dev_dbg(dai->dev, "%s: SND_SOC_DAIFMT_I2S.\n", __func__);
  278. msp_config->data_size = MSP_DATA_BITS_16;
  279. msp_config->protocol = MSP_I2S_PROTOCOL;
  280. ret = setup_i2s_protdesc(prot_desc);
  281. if (ret < 0)
  282. return ret;
  283. break;
  284. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
  285. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
  286. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS:
  287. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM:
  288. dev_dbg(dai->dev, "%s: PCM format.\n", __func__);
  289. msp_config->data_size = MSP_DATA_BITS_16;
  290. msp_config->protocol = MSP_PCM_PROTOCOL;
  291. ret = setup_pcm_protdesc(dai, fmt, prot_desc);
  292. if (ret < 0)
  293. return ret;
  294. ret = setup_pcm_multichan(dai, msp_config);
  295. if (ret < 0)
  296. return ret;
  297. ret = setup_pcm_framing(dai, runtime->rate, prot_desc);
  298. if (ret < 0)
  299. return ret;
  300. break;
  301. default:
  302. dev_err(dai->dev, "%s: Error: Unsupported format (%d)!\n",
  303. __func__, fmt);
  304. return -EINVAL;
  305. }
  306. return setup_clocking(dai, fmt, msp_config);
  307. }
  308. static int ux500_msp_dai_startup(struct snd_pcm_substream *substream,
  309. struct snd_soc_dai *dai)
  310. {
  311. int ret = 0;
  312. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  313. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  314. snd_pcm_stream_str(substream));
  315. /* Enable regulator */
  316. ret = regulator_enable(drvdata->reg_vape);
  317. if (ret != 0) {
  318. dev_err(drvdata->msp->dev,
  319. "%s: Failed to enable regulator!\n", __func__);
  320. return ret;
  321. }
  322. /* Prepare and enable clocks */
  323. dev_dbg(dai->dev, "%s: Enabling MSP-clocks.\n", __func__);
  324. ret = clk_prepare_enable(drvdata->pclk);
  325. if (ret) {
  326. dev_err(drvdata->msp->dev,
  327. "%s: Failed to prepare/enable pclk!\n", __func__);
  328. goto err_pclk;
  329. }
  330. ret = clk_prepare_enable(drvdata->clk);
  331. if (ret) {
  332. dev_err(drvdata->msp->dev,
  333. "%s: Failed to prepare/enable clk!\n", __func__);
  334. goto err_clk;
  335. }
  336. return ret;
  337. err_clk:
  338. clk_disable_unprepare(drvdata->pclk);
  339. err_pclk:
  340. regulator_disable(drvdata->reg_vape);
  341. return ret;
  342. }
  343. static void ux500_msp_dai_shutdown(struct snd_pcm_substream *substream,
  344. struct snd_soc_dai *dai)
  345. {
  346. int ret;
  347. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  348. bool is_playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
  349. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n", __func__, dai->id,
  350. snd_pcm_stream_str(substream));
  351. if (drvdata->vape_opp_constraint == 1) {
  352. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  353. "ux500_msp_i2s", 50);
  354. drvdata->vape_opp_constraint = 0;
  355. }
  356. if (ux500_msp_i2s_close(drvdata->msp,
  357. is_playback ? MSP_DIR_TX : MSP_DIR_RX)) {
  358. dev_err(dai->dev,
  359. "%s: Error: MSP %d (%s): Unable to close i2s.\n",
  360. __func__, dai->id, snd_pcm_stream_str(substream));
  361. }
  362. /* Disable and unprepare clocks */
  363. clk_disable_unprepare(drvdata->clk);
  364. clk_disable_unprepare(drvdata->pclk);
  365. /* Disable regulator */
  366. ret = regulator_disable(drvdata->reg_vape);
  367. if (ret < 0)
  368. dev_err(dai->dev,
  369. "%s: ERROR: Failed to disable regulator (%d)!\n",
  370. __func__, ret);
  371. }
  372. static int ux500_msp_dai_prepare(struct snd_pcm_substream *substream,
  373. struct snd_soc_dai *dai)
  374. {
  375. int ret = 0;
  376. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  377. struct snd_pcm_runtime *runtime = substream->runtime;
  378. struct ux500_msp_config msp_config;
  379. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (rate = %d).\n", __func__,
  380. dai->id, snd_pcm_stream_str(substream), runtime->rate);
  381. setup_msp_config(substream, dai, &msp_config);
  382. ret = ux500_msp_i2s_open(drvdata->msp, &msp_config);
  383. if (ret < 0) {
  384. dev_err(dai->dev, "%s: Error: msp_setup failed (ret = %d)!\n",
  385. __func__, ret);
  386. return ret;
  387. }
  388. /* Set OPP-level */
  389. if ((drvdata->fmt & SND_SOC_DAIFMT_MASTER_MASK) &&
  390. (drvdata->msp->f_bitclk > 19200000)) {
  391. /* If the bit-clock is higher than 19.2MHz, Vape should be
  392. * run in 100% OPP. Only when bit-clock is used (MSP master)
  393. */
  394. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  395. "ux500-msp-i2s", 100);
  396. drvdata->vape_opp_constraint = 1;
  397. } else {
  398. prcmu_qos_update_requirement(PRCMU_QOS_APE_OPP,
  399. "ux500-msp-i2s", 50);
  400. drvdata->vape_opp_constraint = 0;
  401. }
  402. return ret;
  403. }
  404. static int ux500_msp_dai_hw_params(struct snd_pcm_substream *substream,
  405. struct snd_pcm_hw_params *params,
  406. struct snd_soc_dai *dai)
  407. {
  408. unsigned int mask, slots_active;
  409. struct snd_pcm_runtime *runtime = substream->runtime;
  410. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  411. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter.\n",
  412. __func__, dai->id, snd_pcm_stream_str(substream));
  413. switch (drvdata->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  414. case SND_SOC_DAIFMT_I2S:
  415. snd_pcm_hw_constraint_minmax(runtime,
  416. SNDRV_PCM_HW_PARAM_CHANNELS,
  417. 1, 2);
  418. break;
  419. case SND_SOC_DAIFMT_DSP_B:
  420. case SND_SOC_DAIFMT_DSP_A:
  421. mask = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
  422. drvdata->tx_mask :
  423. drvdata->rx_mask;
  424. slots_active = hweight32(mask);
  425. dev_dbg(dai->dev, "TDM-slots active: %d", slots_active);
  426. snd_pcm_hw_constraint_single(runtime,
  427. SNDRV_PCM_HW_PARAM_CHANNELS,
  428. slots_active);
  429. break;
  430. default:
  431. dev_err(dai->dev,
  432. "%s: Error: Unsupported protocol (fmt = 0x%x)!\n",
  433. __func__, drvdata->fmt);
  434. return -EINVAL;
  435. }
  436. return 0;
  437. }
  438. static int ux500_msp_dai_set_dai_fmt(struct snd_soc_dai *dai,
  439. unsigned int fmt)
  440. {
  441. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  442. dev_dbg(dai->dev, "%s: MSP %d: Enter.\n", __func__, dai->id);
  443. switch (fmt & (SND_SOC_DAIFMT_FORMAT_MASK |
  444. SND_SOC_DAIFMT_MASTER_MASK)) {
  445. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
  446. case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
  447. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBS_CFS:
  448. case SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_CBM_CFM:
  449. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
  450. case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
  451. break;
  452. default:
  453. dev_err(dai->dev,
  454. "%s: Error: Unsupported protocol/master (fmt = 0x%x)!\n",
  455. __func__, drvdata->fmt);
  456. return -EINVAL;
  457. }
  458. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  459. case SND_SOC_DAIFMT_NB_NF:
  460. case SND_SOC_DAIFMT_NB_IF:
  461. case SND_SOC_DAIFMT_IB_IF:
  462. break;
  463. default:
  464. dev_err(dai->dev,
  465. "%s: Error: Unsupported inversion (fmt = 0x%x)!\n",
  466. __func__, drvdata->fmt);
  467. return -EINVAL;
  468. }
  469. drvdata->fmt = fmt;
  470. return 0;
  471. }
  472. static int ux500_msp_dai_set_tdm_slot(struct snd_soc_dai *dai,
  473. unsigned int tx_mask,
  474. unsigned int rx_mask,
  475. int slots, int slot_width)
  476. {
  477. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  478. unsigned int cap;
  479. switch (slots) {
  480. case 1:
  481. cap = 0x01;
  482. break;
  483. case 2:
  484. cap = 0x03;
  485. break;
  486. case 8:
  487. cap = 0xFF;
  488. break;
  489. case 16:
  490. cap = 0xFFFF;
  491. break;
  492. default:
  493. dev_err(dai->dev, "%s: Error: Unsupported slot-count (%d)!\n",
  494. __func__, slots);
  495. return -EINVAL;
  496. }
  497. drvdata->slots = slots;
  498. if (!(slot_width == 16)) {
  499. dev_err(dai->dev, "%s: Error: Unsupported slot-width (%d)!\n",
  500. __func__, slot_width);
  501. return -EINVAL;
  502. }
  503. drvdata->slot_width = slot_width;
  504. drvdata->tx_mask = tx_mask & cap;
  505. drvdata->rx_mask = rx_mask & cap;
  506. return 0;
  507. }
  508. static int ux500_msp_dai_set_dai_sysclk(struct snd_soc_dai *dai,
  509. int clk_id, unsigned int freq, int dir)
  510. {
  511. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  512. dev_dbg(dai->dev, "%s: MSP %d: Enter. clk-id: %d, freq: %u.\n",
  513. __func__, dai->id, clk_id, freq);
  514. switch (clk_id) {
  515. case UX500_MSP_MASTER_CLOCK:
  516. drvdata->master_clk = freq;
  517. break;
  518. default:
  519. dev_err(dai->dev, "%s: MSP %d: Invalid clk-id (%d)!\n",
  520. __func__, dai->id, clk_id);
  521. return -EINVAL;
  522. }
  523. return 0;
  524. }
  525. static int ux500_msp_dai_trigger(struct snd_pcm_substream *substream,
  526. int cmd, struct snd_soc_dai *dai)
  527. {
  528. int ret = 0;
  529. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  530. dev_dbg(dai->dev, "%s: MSP %d (%s): Enter (msp->id = %d, cmd = %d).\n",
  531. __func__, dai->id, snd_pcm_stream_str(substream),
  532. (int)drvdata->msp->id, cmd);
  533. ret = ux500_msp_i2s_trigger(drvdata->msp, cmd, substream->stream);
  534. return ret;
  535. }
  536. static int ux500_msp_dai_of_probe(struct snd_soc_dai *dai)
  537. {
  538. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  539. struct snd_dmaengine_dai_dma_data *playback_dma_data;
  540. struct snd_dmaengine_dai_dma_data *capture_dma_data;
  541. playback_dma_data = devm_kzalloc(dai->dev,
  542. sizeof(*playback_dma_data),
  543. GFP_KERNEL);
  544. if (!playback_dma_data)
  545. return -ENOMEM;
  546. capture_dma_data = devm_kzalloc(dai->dev,
  547. sizeof(*capture_dma_data),
  548. GFP_KERNEL);
  549. if (!capture_dma_data)
  550. return -ENOMEM;
  551. playback_dma_data->addr = drvdata->msp->playback_dma_data.tx_rx_addr;
  552. capture_dma_data->addr = drvdata->msp->capture_dma_data.tx_rx_addr;
  553. playback_dma_data->maxburst = 4;
  554. capture_dma_data->maxburst = 4;
  555. snd_soc_dai_init_dma_data(dai, playback_dma_data, capture_dma_data);
  556. return 0;
  557. }
  558. static int ux500_msp_dai_probe(struct snd_soc_dai *dai)
  559. {
  560. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(dai->dev);
  561. struct msp_i2s_platform_data *pdata = dai->dev->platform_data;
  562. int ret;
  563. if (!pdata) {
  564. ret = ux500_msp_dai_of_probe(dai);
  565. return ret;
  566. }
  567. drvdata->msp->playback_dma_data.data_size = drvdata->slot_width;
  568. drvdata->msp->capture_dma_data.data_size = drvdata->slot_width;
  569. snd_soc_dai_init_dma_data(dai,
  570. &drvdata->msp->playback_dma_data,
  571. &drvdata->msp->capture_dma_data);
  572. return 0;
  573. }
  574. static const struct snd_soc_dai_ops ux500_msp_dai_ops[] = {
  575. {
  576. .set_sysclk = ux500_msp_dai_set_dai_sysclk,
  577. .set_fmt = ux500_msp_dai_set_dai_fmt,
  578. .set_tdm_slot = ux500_msp_dai_set_tdm_slot,
  579. .startup = ux500_msp_dai_startup,
  580. .shutdown = ux500_msp_dai_shutdown,
  581. .prepare = ux500_msp_dai_prepare,
  582. .trigger = ux500_msp_dai_trigger,
  583. .hw_params = ux500_msp_dai_hw_params,
  584. }
  585. };
  586. static struct snd_soc_dai_driver ux500_msp_dai_drv = {
  587. .probe = ux500_msp_dai_probe,
  588. .suspend = NULL,
  589. .resume = NULL,
  590. .playback.channels_min = UX500_MSP_MIN_CHANNELS,
  591. .playback.channels_max = UX500_MSP_MAX_CHANNELS,
  592. .playback.rates = UX500_I2S_RATES,
  593. .playback.formats = UX500_I2S_FORMATS,
  594. .capture.channels_min = UX500_MSP_MIN_CHANNELS,
  595. .capture.channels_max = UX500_MSP_MAX_CHANNELS,
  596. .capture.rates = UX500_I2S_RATES,
  597. .capture.formats = UX500_I2S_FORMATS,
  598. .ops = ux500_msp_dai_ops,
  599. };
  600. static const struct snd_soc_component_driver ux500_msp_component = {
  601. .name = "ux500-msp",
  602. };
  603. static int ux500_msp_drv_probe(struct platform_device *pdev)
  604. {
  605. struct ux500_msp_i2s_drvdata *drvdata;
  606. struct msp_i2s_platform_data *pdata = pdev->dev.platform_data;
  607. struct device_node *np = pdev->dev.of_node;
  608. int ret = 0;
  609. if (!pdata && !np) {
  610. dev_err(&pdev->dev, "No platform data or Device Tree found\n");
  611. return -ENODEV;
  612. }
  613. drvdata = devm_kzalloc(&pdev->dev,
  614. sizeof(struct ux500_msp_i2s_drvdata),
  615. GFP_KERNEL);
  616. if (!drvdata)
  617. return -ENOMEM;
  618. drvdata->fmt = 0;
  619. drvdata->slots = 1;
  620. drvdata->tx_mask = 0x01;
  621. drvdata->rx_mask = 0x01;
  622. drvdata->slot_width = 16;
  623. drvdata->master_clk = MSP_INPUT_FREQ_APB;
  624. drvdata->reg_vape = devm_regulator_get(&pdev->dev, "v-ape");
  625. if (IS_ERR(drvdata->reg_vape)) {
  626. ret = (int)PTR_ERR(drvdata->reg_vape);
  627. dev_err(&pdev->dev,
  628. "%s: ERROR: Failed to get Vape supply (%d)!\n",
  629. __func__, ret);
  630. return ret;
  631. }
  632. prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP, (char *)pdev->name, 50);
  633. drvdata->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
  634. if (IS_ERR(drvdata->pclk)) {
  635. ret = (int)PTR_ERR(drvdata->pclk);
  636. dev_err(&pdev->dev,
  637. "%s: ERROR: devm_clk_get of pclk failed (%d)!\n",
  638. __func__, ret);
  639. return ret;
  640. }
  641. drvdata->clk = devm_clk_get(&pdev->dev, NULL);
  642. if (IS_ERR(drvdata->clk)) {
  643. ret = (int)PTR_ERR(drvdata->clk);
  644. dev_err(&pdev->dev,
  645. "%s: ERROR: devm_clk_get failed (%d)!\n",
  646. __func__, ret);
  647. return ret;
  648. }
  649. ret = ux500_msp_i2s_init_msp(pdev, &drvdata->msp,
  650. pdev->dev.platform_data);
  651. if (!drvdata->msp) {
  652. dev_err(&pdev->dev,
  653. "%s: ERROR: Failed to init MSP-struct (%d)!",
  654. __func__, ret);
  655. return ret;
  656. }
  657. dev_set_drvdata(&pdev->dev, drvdata);
  658. ret = snd_soc_register_component(&pdev->dev, &ux500_msp_component,
  659. &ux500_msp_dai_drv, 1);
  660. if (ret < 0) {
  661. dev_err(&pdev->dev, "Error: %s: Failed to register MSP%d!\n",
  662. __func__, drvdata->msp->id);
  663. return ret;
  664. }
  665. ret = ux500_pcm_register_platform(pdev);
  666. if (ret < 0) {
  667. dev_err(&pdev->dev,
  668. "Error: %s: Failed to register PCM platform device!\n",
  669. __func__);
  670. goto err_reg_plat;
  671. }
  672. return 0;
  673. err_reg_plat:
  674. snd_soc_unregister_component(&pdev->dev);
  675. return ret;
  676. }
  677. static int ux500_msp_drv_remove(struct platform_device *pdev)
  678. {
  679. struct ux500_msp_i2s_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
  680. ux500_pcm_unregister_platform(pdev);
  681. snd_soc_unregister_component(&pdev->dev);
  682. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP, "ux500_msp_i2s");
  683. ux500_msp_i2s_cleanup_msp(pdev, drvdata->msp);
  684. return 0;
  685. }
  686. static const struct of_device_id ux500_msp_i2s_match[] = {
  687. { .compatible = "stericsson,ux500-msp-i2s", },
  688. {},
  689. };
  690. MODULE_DEVICE_TABLE(of, ux500_msp_i2s_match);
  691. static struct platform_driver msp_i2s_driver = {
  692. .driver = {
  693. .name = "ux500-msp-i2s",
  694. .of_match_table = ux500_msp_i2s_match,
  695. },
  696. .probe = ux500_msp_drv_probe,
  697. .remove = ux500_msp_drv_remove,
  698. };
  699. module_platform_driver(msp_i2s_driver);
  700. MODULE_LICENSE("GPL v2");